1*5c2ecfceSDavid Heidelberg# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*5c2ecfceSDavid Heidelberg%YAML 1.2 3*5c2ecfceSDavid Heidelberg--- 4*5c2ecfceSDavid Heidelberg$id: "http://devicetree.org/schemas/phy/phy-tegra194-p2u.yaml#" 5*5c2ecfceSDavid Heidelberg$schema: "http://devicetree.org/meta-schemas/core.yaml#" 6*5c2ecfceSDavid Heidelberg 7*5c2ecfceSDavid Heidelbergtitle: NVIDIA Tegra194 P2U binding 8*5c2ecfceSDavid Heidelberg 9*5c2ecfceSDavid Heidelbergmaintainers: 10*5c2ecfceSDavid Heidelberg - Thierry Reding <treding@nvidia.com> 11*5c2ecfceSDavid Heidelberg 12*5c2ecfceSDavid Heidelbergdescription: > 13*5c2ecfceSDavid Heidelberg Tegra194 has two PHY bricks namely HSIO (High Speed IO) and NVHS (NVIDIA High 14*5c2ecfceSDavid Heidelberg Speed) each interfacing with 12 and 8 P2U instances respectively. 15*5c2ecfceSDavid Heidelberg A P2U instance is a glue logic between Synopsys DesignWare Core PCIe IP's PIPE 16*5c2ecfceSDavid Heidelberg interface and PHY of HSIO/NVHS bricks. Each P2U instance represents one PCIe 17*5c2ecfceSDavid Heidelberg lane. 18*5c2ecfceSDavid Heidelberg 19*5c2ecfceSDavid Heidelbergproperties: 20*5c2ecfceSDavid Heidelberg compatible: 21*5c2ecfceSDavid Heidelberg const: nvidia,tegra194-p2u 22*5c2ecfceSDavid Heidelberg 23*5c2ecfceSDavid Heidelberg reg: 24*5c2ecfceSDavid Heidelberg maxItems: 1 25*5c2ecfceSDavid Heidelberg description: Should be the physical address space and length of respective each P2U instance. 26*5c2ecfceSDavid Heidelberg 27*5c2ecfceSDavid Heidelberg reg-names: 28*5c2ecfceSDavid Heidelberg items: 29*5c2ecfceSDavid Heidelberg - const: ctl 30*5c2ecfceSDavid Heidelberg 31*5c2ecfceSDavid Heidelberg '#phy-cells': 32*5c2ecfceSDavid Heidelberg const: 0 33*5c2ecfceSDavid Heidelberg 34*5c2ecfceSDavid HeidelbergadditionalProperties: false 35*5c2ecfceSDavid Heidelberg 36*5c2ecfceSDavid Heidelbergexamples: 37*5c2ecfceSDavid Heidelberg - | 38*5c2ecfceSDavid Heidelberg p2u_hsio_0: phy@3e10000 { 39*5c2ecfceSDavid Heidelberg compatible = "nvidia,tegra194-p2u"; 40*5c2ecfceSDavid Heidelberg reg = <0x03e10000 0x10000>; 41*5c2ecfceSDavid Heidelberg reg-names = "ctl"; 42*5c2ecfceSDavid Heidelberg 43*5c2ecfceSDavid Heidelberg #phy-cells = <0>; 44*5c2ecfceSDavid Heidelberg }; 45