12d69a115SJoachim EastwoodNXP LPC18xx/43xx internal USB OTG PHY binding
22d69a115SJoachim Eastwood---------------------------------------------
32d69a115SJoachim Eastwood
42d69a115SJoachim EastwoodThis file contains documentation for the internal USB OTG PHY found
52d69a115SJoachim Eastwoodin NXP LPC18xx and LPC43xx SoCs.
62d69a115SJoachim Eastwood
72d69a115SJoachim EastwoodRequired properties:
82d69a115SJoachim Eastwood- compatible	: must be "nxp,lpc1850-usb-otg-phy"
92d69a115SJoachim Eastwood- clocks	: must be exactly one entry
102d69a115SJoachim EastwoodSee: Documentation/devicetree/bindings/clock/clock-bindings.txt
112d69a115SJoachim Eastwood- #phy-cells	: must be 0 for this phy
122d69a115SJoachim EastwoodSee: Documentation/devicetree/bindings/phy/phy-bindings.txt
132d69a115SJoachim Eastwood
142d69a115SJoachim EastwoodThe phy node must be a child of the creg syscon node.
152d69a115SJoachim Eastwood
162d69a115SJoachim EastwoodExample:
172d69a115SJoachim Eastwoodcreg: syscon@40043000 {
182d69a115SJoachim Eastwood	compatible = "nxp,lpc1850-creg", "syscon", "simple-mfd";
192d69a115SJoachim Eastwood	reg = <0x40043000 0x1000>;
202d69a115SJoachim Eastwood
211db7f620SJoachim Eastwood	usb0_otg_phy: phy {
222d69a115SJoachim Eastwood		compatible = "nxp,lpc1850-usb-otg-phy";
232d69a115SJoachim Eastwood		clocks = <&ccu1 CLK_USB0>;
242d69a115SJoachim Eastwood		#phy-cells = <0>;
252d69a115SJoachim Eastwood	};
262d69a115SJoachim Eastwood};
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