1c25b84c0SMaxime Ripard# SPDX-License-Identifier: GPL-2.0
2c25b84c0SMaxime Ripard%YAML 1.2
3c25b84c0SMaxime Ripard---
4e1ff7390SRob Herring$id: http://devicetree.org/schemas/phy/allwinner,sun6i-a31-mipi-dphy.yaml#
5c25b84c0SMaxime Ripard$schema: http://devicetree.org/meta-schemas/core.yaml#
6c25b84c0SMaxime Ripard
7c25b84c0SMaxime Ripardtitle: Allwinner A31 MIPI D-PHY Controller Device Tree Bindings
8c25b84c0SMaxime Ripard
9c25b84c0SMaxime Ripardmaintainers:
10c25b84c0SMaxime Ripard  - Chen-Yu Tsai <wens@csie.org>
11c25b84c0SMaxime Ripard  - Maxime Ripard <maxime.ripard@bootlin.com>
12c25b84c0SMaxime Ripard
13c25b84c0SMaxime Ripardproperties:
14c25b84c0SMaxime Ripard  "#phy-cells":
15c25b84c0SMaxime Ripard    const: 0
16c25b84c0SMaxime Ripard
17c25b84c0SMaxime Ripard  compatible:
18c25b84c0SMaxime Ripard    const: allwinner,sun6i-a31-mipi-dphy
19c25b84c0SMaxime Ripard
20c25b84c0SMaxime Ripard  reg:
21c25b84c0SMaxime Ripard    maxItems: 1
22c25b84c0SMaxime Ripard
23c25b84c0SMaxime Ripard  clocks:
24c25b84c0SMaxime Ripard    items:
25c25b84c0SMaxime Ripard      - description: Bus Clock
26c25b84c0SMaxime Ripard      - description: Module Clock
27c25b84c0SMaxime Ripard
28c25b84c0SMaxime Ripard  clock-names:
29c25b84c0SMaxime Ripard    items:
30c25b84c0SMaxime Ripard      - const: bus
31c25b84c0SMaxime Ripard      - const: mod
32c25b84c0SMaxime Ripard
33c25b84c0SMaxime Ripard  resets:
34c25b84c0SMaxime Ripard    maxItems: 1
35c25b84c0SMaxime Ripard
36c25b84c0SMaxime Ripardrequired:
37c25b84c0SMaxime Ripard  - "#phy-cells"
38c25b84c0SMaxime Ripard  - compatible
39c25b84c0SMaxime Ripard  - reg
40c25b84c0SMaxime Ripard  - clocks
41c25b84c0SMaxime Ripard  - clock-names
42c25b84c0SMaxime Ripard  - resets
43c25b84c0SMaxime Ripard
44c25b84c0SMaxime RipardadditionalProperties: false
45c25b84c0SMaxime Ripard
46c25b84c0SMaxime Ripardexamples:
47c25b84c0SMaxime Ripard  - |
48c25b84c0SMaxime Ripard    dphy0: d-phy@1ca1000 {
49c25b84c0SMaxime Ripard        compatible = "allwinner,sun6i-a31-mipi-dphy";
50c25b84c0SMaxime Ripard        reg = <0x01ca1000 0x1000>;
51c25b84c0SMaxime Ripard        clocks = <&ccu 23>, <&ccu 97>;
52c25b84c0SMaxime Ripard        clock-names = "bus", "mod";
53c25b84c0SMaxime Ripard        resets = <&ccu 4>;
54c25b84c0SMaxime Ripard        #phy-cells = <0>;
55c25b84c0SMaxime Ripard    };
56c25b84c0SMaxime Ripard
57c25b84c0SMaxime Ripard...
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