1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright 2020 Arm Ltd.
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/perf/arm,cmn.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Arm CMN (Coherent Mesh Network) Performance Monitors
9
10maintainers:
11  - Robin Murphy <robin.murphy@arm.com>
12
13properties:
14  compatible:
15    enum:
16      - arm,cmn-600
17      - arm,ci-700
18
19  reg:
20    items:
21      - description: Physical address of the base (PERIPHBASE) and
22          size of the configuration address space.
23
24  interrupts:
25    minItems: 1
26    items:
27      - description: Overflow interrupt for DTC0
28      - description: Overflow interrupt for DTC1
29      - description: Overflow interrupt for DTC2
30      - description: Overflow interrupt for DTC3
31    description: One interrupt for each DTC domain implemented must
32      be specified, in order. DTC0 is always present.
33
34  arm,root-node:
35    $ref: /schemas/types.yaml#/definitions/uint32
36    description: Offset from PERIPHBASE of CMN-600's configuration
37      discovery node (see TRM definition of ROOTNODEBASE). Not
38      relevant for newer CMN/CI products.
39
40required:
41  - compatible
42  - reg
43  - interrupts
44
45if:
46  properties:
47    compatible:
48      contains:
49        const: arm,cmn-600
50then:
51  required:
52    - arm,root-node
53
54additionalProperties: false
55
56examples:
57  - |
58    #include <dt-bindings/interrupt-controller/arm-gic.h>
59    #include <dt-bindings/interrupt-controller/irq.h>
60    pmu@50000000 {
61        compatible = "arm,cmn-600";
62        reg = <0x50000000 0x4000000>;
63        /* 4x2 mesh with one DTC, and CFG node at 0,1,1,0 */
64        interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
65        arm,root-node = <0x104000>;
66    };
67...
68