1*560e9ce1SThippeswamy Havalige# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*560e9ce1SThippeswamy Havalige%YAML 1.2
3*560e9ce1SThippeswamy Havalige---
4*560e9ce1SThippeswamy Havalige$id: http://devicetree.org/schemas/pci/xlnx,axi-pcie-host.yaml#
5*560e9ce1SThippeswamy Havalige$schema: http://devicetree.org/meta-schemas/core.yaml#
6*560e9ce1SThippeswamy Havalige
7*560e9ce1SThippeswamy Havaligetitle: Xilinx AXI PCIe Root Port Bridge
8*560e9ce1SThippeswamy Havalige
9*560e9ce1SThippeswamy Havaligemaintainers:
10*560e9ce1SThippeswamy Havalige  - Thippeswamy Havalige <thippeswamy.havalige@amd.com>
11*560e9ce1SThippeswamy Havalige
12*560e9ce1SThippeswamy HavaligeallOf:
13*560e9ce1SThippeswamy Havalige  - $ref: /schemas/pci/pci-bus.yaml#
14*560e9ce1SThippeswamy Havalige
15*560e9ce1SThippeswamy Havaligeproperties:
16*560e9ce1SThippeswamy Havalige  compatible:
17*560e9ce1SThippeswamy Havalige    const: xlnx,axi-pcie-host-1.00.a
18*560e9ce1SThippeswamy Havalige
19*560e9ce1SThippeswamy Havalige  reg:
20*560e9ce1SThippeswamy Havalige    maxItems: 1
21*560e9ce1SThippeswamy Havalige
22*560e9ce1SThippeswamy Havalige  interrupts:
23*560e9ce1SThippeswamy Havalige    maxItems: 1
24*560e9ce1SThippeswamy Havalige
25*560e9ce1SThippeswamy Havalige  ranges:
26*560e9ce1SThippeswamy Havalige    items:
27*560e9ce1SThippeswamy Havalige      - description: |
28*560e9ce1SThippeswamy Havalige          ranges for the PCI memory regions (I/O space region is not
29*560e9ce1SThippeswamy Havalige          supported by hardware)
30*560e9ce1SThippeswamy Havalige
31*560e9ce1SThippeswamy Havalige  "#interrupt-cells":
32*560e9ce1SThippeswamy Havalige    const: 1
33*560e9ce1SThippeswamy Havalige
34*560e9ce1SThippeswamy Havalige  interrupt-controller:
35*560e9ce1SThippeswamy Havalige    description: identifies the node as an interrupt controller
36*560e9ce1SThippeswamy Havalige    type: object
37*560e9ce1SThippeswamy Havalige    properties:
38*560e9ce1SThippeswamy Havalige      interrupt-controller: true
39*560e9ce1SThippeswamy Havalige
40*560e9ce1SThippeswamy Havalige      "#address-cells":
41*560e9ce1SThippeswamy Havalige        const: 0
42*560e9ce1SThippeswamy Havalige
43*560e9ce1SThippeswamy Havalige      "#interrupt-cells":
44*560e9ce1SThippeswamy Havalige        const: 1
45*560e9ce1SThippeswamy Havalige
46*560e9ce1SThippeswamy Havalige    required:
47*560e9ce1SThippeswamy Havalige      - interrupt-controller
48*560e9ce1SThippeswamy Havalige      - "#address-cells"
49*560e9ce1SThippeswamy Havalige      - "#interrupt-cells"
50*560e9ce1SThippeswamy Havalige
51*560e9ce1SThippeswamy Havalige    additionalProperties: false
52*560e9ce1SThippeswamy Havalige
53*560e9ce1SThippeswamy Havaligerequired:
54*560e9ce1SThippeswamy Havalige  - compatible
55*560e9ce1SThippeswamy Havalige  - reg
56*560e9ce1SThippeswamy Havalige  - ranges
57*560e9ce1SThippeswamy Havalige  - interrupts
58*560e9ce1SThippeswamy Havalige  - interrupt-map
59*560e9ce1SThippeswamy Havalige  - "#interrupt-cells"
60*560e9ce1SThippeswamy Havalige  - interrupt-controller
61*560e9ce1SThippeswamy Havalige
62*560e9ce1SThippeswamy HavaligeunevaluatedProperties: false
63*560e9ce1SThippeswamy Havalige
64*560e9ce1SThippeswamy Havaligeexamples:
65*560e9ce1SThippeswamy Havalige  - |
66*560e9ce1SThippeswamy Havalige    #include <dt-bindings/interrupt-controller/arm-gic.h>
67*560e9ce1SThippeswamy Havalige    #include <dt-bindings/interrupt-controller/irq.h>
68*560e9ce1SThippeswamy Havalige
69*560e9ce1SThippeswamy Havalige    pcie@50000000 {
70*560e9ce1SThippeswamy Havalige        compatible = "xlnx,axi-pcie-host-1.00.a";
71*560e9ce1SThippeswamy Havalige        reg = <0x50000000 0x1000000>;
72*560e9ce1SThippeswamy Havalige        #address-cells = <3>;
73*560e9ce1SThippeswamy Havalige        #size-cells = <2>;
74*560e9ce1SThippeswamy Havalige        #interrupt-cells = <1>;
75*560e9ce1SThippeswamy Havalige        device_type = "pci";
76*560e9ce1SThippeswamy Havalige        interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
77*560e9ce1SThippeswamy Havalige        interrupt-map-mask = <0 0 0 7>;
78*560e9ce1SThippeswamy Havalige        interrupt-map = <0 0 0 1 &pcie_intc 1>,
79*560e9ce1SThippeswamy Havalige                        <0 0 0 2 &pcie_intc 2>,
80*560e9ce1SThippeswamy Havalige                        <0 0 0 3 &pcie_intc 3>,
81*560e9ce1SThippeswamy Havalige                        <0 0 0 4 &pcie_intc 4>;
82*560e9ce1SThippeswamy Havalige        ranges = <0x02000000 0 0x60000000 0x60000000 0 0x10000000>;
83*560e9ce1SThippeswamy Havalige        pcie_intc: interrupt-controller {
84*560e9ce1SThippeswamy Havalige            interrupt-controller;
85*560e9ce1SThippeswamy Havalige            #address-cells = <0>;
86*560e9ce1SThippeswamy Havalige            #interrupt-cells = <1>;
87*560e9ce1SThippeswamy Havalige        };
88*560e9ce1SThippeswamy Havalige    };
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