1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2# Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ 3%YAML 1.2 4--- 5$id: "http://devicetree.org/schemas/pci/ti,j721e-pci-ep.yaml#" 6$schema: "http://devicetree.org/meta-schemas/core.yaml#" 7 8title: TI J721E PCI EP (PCIe Wrapper) 9 10maintainers: 11 - Kishon Vijay Abraham I <kishon@ti.com> 12 13allOf: 14 - $ref: "cdns-pcie-ep.yaml#" 15 16properties: 17 compatible: 18 enum: 19 - ti,j721e-pcie-ep 20 21 reg: 22 maxItems: 4 23 24 reg-names: 25 items: 26 - const: intd_cfg 27 - const: user_cfg 28 - const: reg 29 - const: mem 30 31 ti,syscon-pcie-ctrl: 32 $ref: /schemas/types.yaml#/definitions/phandle-array 33 items: 34 - items: 35 - description: Phandle to the SYSCON entry 36 - description: pcie_ctrl register offset within SYSCON 37 description: Specifier for configuring PCIe mode and link speed. 38 39 power-domains: 40 maxItems: 1 41 42 clocks: 43 maxItems: 1 44 description: clock-specifier to represent input to the PCIe 45 46 clock-names: 47 items: 48 - const: fck 49 50 dma-coherent: 51 description: Indicates that the PCIe IP block can ensure the coherency 52 53required: 54 - compatible 55 - reg 56 - reg-names 57 - ti,syscon-pcie-ctrl 58 - max-link-speed 59 - num-lanes 60 - power-domains 61 - clocks 62 - clock-names 63 - dma-coherent 64 - max-functions 65 - phys 66 - phy-names 67 68unevaluatedProperties: false 69 70examples: 71 - | 72 #include <dt-bindings/soc/ti,sci_pm_domain.h> 73 74 bus { 75 #address-cells = <2>; 76 #size-cells = <2>; 77 78 pcie0_ep: pcie-ep@d000000 { 79 compatible = "ti,j721e-pcie-ep"; 80 reg = <0x00 0x02900000 0x00 0x1000>, 81 <0x00 0x02907000 0x00 0x400>, 82 <0x00 0x0d000000 0x00 0x00800000>, 83 <0x00 0x10000000 0x00 0x08000000>; 84 reg-names = "intd_cfg", "user_cfg", "reg", "mem"; 85 ti,syscon-pcie-ctrl = <&pcie0_ctrl 0x4070>; 86 max-link-speed = <3>; 87 num-lanes = <2>; 88 power-domains = <&k3_pds 239 TI_SCI_PD_EXCLUSIVE>; 89 clocks = <&k3_clks 239 1>; 90 clock-names = "fck"; 91 max-functions = /bits/ 8 <6>; 92 dma-coherent; 93 phys = <&serdes0_pcie_link>; 94 phy-names = "pcie-phy"; 95 }; 96 }; 97