1eea23e4aSMarek Szyprowski# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2eea23e4aSMarek Szyprowski%YAML 1.2 3eea23e4aSMarek Szyprowski--- 4eea23e4aSMarek Szyprowski$id: http://devicetree.org/schemas/pci/samsung,exynos-pcie.yaml# 5eea23e4aSMarek Szyprowski$schema: http://devicetree.org/meta-schemas/core.yaml# 6eea23e4aSMarek Szyprowski 7*dd3cb467SAndrew Lunntitle: Samsung SoC series PCIe Host Controller 8eea23e4aSMarek Szyprowski 9eea23e4aSMarek Szyprowskimaintainers: 10eea23e4aSMarek Szyprowski - Marek Szyprowski <m.szyprowski@samsung.com> 11eea23e4aSMarek Szyprowski - Jaehoon Chung <jh80.chung@samsung.com> 12eea23e4aSMarek Szyprowski 13eea23e4aSMarek Szyprowskidescription: |+ 14eea23e4aSMarek Szyprowski Exynos5433 SoC PCIe host controller is based on the Synopsys DesignWare 15eea23e4aSMarek Szyprowski PCIe IP and thus inherits all the common properties defined in 16320e1098SMauro Carvalho Chehab snps,dw-pcie.yaml. 17eea23e4aSMarek Szyprowski 18eea23e4aSMarek SzyprowskiallOf: 19320e1098SMauro Carvalho Chehab - $ref: /schemas/pci/snps,dw-pcie.yaml# 20eea23e4aSMarek Szyprowski 21eea23e4aSMarek Szyprowskiproperties: 22eea23e4aSMarek Szyprowski compatible: 23eea23e4aSMarek Szyprowski const: samsung,exynos5433-pcie 24eea23e4aSMarek Szyprowski 25eea23e4aSMarek Szyprowski reg: 26eea23e4aSMarek Szyprowski items: 27eea23e4aSMarek Szyprowski - description: Data Bus Interface (DBI) registers. 28eea23e4aSMarek Szyprowski - description: External Local Bus interface (ELBI) registers. 29eea23e4aSMarek Szyprowski - description: PCIe configuration space region. 30eea23e4aSMarek Szyprowski 31eea23e4aSMarek Szyprowski reg-names: 32eea23e4aSMarek Szyprowski items: 33eea23e4aSMarek Szyprowski - const: dbi 34eea23e4aSMarek Szyprowski - const: elbi 35eea23e4aSMarek Szyprowski - const: config 36eea23e4aSMarek Szyprowski 37eea23e4aSMarek Szyprowski interrupts: 38eea23e4aSMarek Szyprowski maxItems: 1 39eea23e4aSMarek Szyprowski 40eea23e4aSMarek Szyprowski clocks: 41eea23e4aSMarek Szyprowski items: 42eea23e4aSMarek Szyprowski - description: PCIe bridge clock 43eea23e4aSMarek Szyprowski - description: PCIe bus clock 44eea23e4aSMarek Szyprowski 45eea23e4aSMarek Szyprowski clock-names: 46eea23e4aSMarek Szyprowski items: 47eea23e4aSMarek Szyprowski - const: pcie 48eea23e4aSMarek Szyprowski - const: pcie_bus 49eea23e4aSMarek Szyprowski 50eea23e4aSMarek Szyprowski phys: 51eea23e4aSMarek Szyprowski maxItems: 1 52eea23e4aSMarek Szyprowski 53eea23e4aSMarek Szyprowski vdd10-supply: 54eea23e4aSMarek Szyprowski description: 55eea23e4aSMarek Szyprowski Phandle to a regulator that provides 1.0V power to the PCIe block. 56eea23e4aSMarek Szyprowski 57eea23e4aSMarek Szyprowski vdd18-supply: 58eea23e4aSMarek Szyprowski description: 59eea23e4aSMarek Szyprowski Phandle to a regulator that provides 1.8V power to the PCIe block. 60eea23e4aSMarek Szyprowski 61eea23e4aSMarek Szyprowski num-lanes: 62eea23e4aSMarek Szyprowski const: 1 63eea23e4aSMarek Szyprowski 64eea23e4aSMarek Szyprowski num-viewport: 65eea23e4aSMarek Szyprowski const: 3 66eea23e4aSMarek Szyprowski 67eea23e4aSMarek Szyprowskirequired: 68eea23e4aSMarek Szyprowski - reg 69eea23e4aSMarek Szyprowski - reg-names 70eea23e4aSMarek Szyprowski - interrupts 71eea23e4aSMarek Szyprowski - "#address-cells" 72eea23e4aSMarek Szyprowski - "#size-cells" 73eea23e4aSMarek Szyprowski - "#interrupt-cells" 74eea23e4aSMarek Szyprowski - interrupt-map 75eea23e4aSMarek Szyprowski - interrupt-map-mask 76eea23e4aSMarek Szyprowski - ranges 77eea23e4aSMarek Szyprowski - bus-range 78eea23e4aSMarek Szyprowski - device_type 79eea23e4aSMarek Szyprowski - num-lanes 80eea23e4aSMarek Szyprowski - num-viewport 81eea23e4aSMarek Szyprowski - clocks 82eea23e4aSMarek Szyprowski - clock-names 83eea23e4aSMarek Szyprowski - phys 84eea23e4aSMarek Szyprowski - vdd10-supply 85eea23e4aSMarek Szyprowski - vdd18-supply 86eea23e4aSMarek Szyprowski 87eea23e4aSMarek SzyprowskiunevaluatedProperties: false 88eea23e4aSMarek Szyprowski 89eea23e4aSMarek Szyprowskiexamples: 90eea23e4aSMarek Szyprowski - | 91eea23e4aSMarek Szyprowski #include <dt-bindings/interrupt-controller/irq.h> 92eea23e4aSMarek Szyprowski #include <dt-bindings/interrupt-controller/arm-gic.h> 93eea23e4aSMarek Szyprowski #include <dt-bindings/clock/exynos5433.h> 94eea23e4aSMarek Szyprowski 95eea23e4aSMarek Szyprowski pcie: pcie@15700000 { 96eea23e4aSMarek Szyprowski compatible = "samsung,exynos5433-pcie"; 97eea23e4aSMarek Szyprowski reg = <0x15700000 0x1000>, <0x156b0000 0x1000>, <0x0c000000 0x1000>; 98eea23e4aSMarek Szyprowski reg-names = "dbi", "elbi", "config"; 99eea23e4aSMarek Szyprowski #address-cells = <3>; 100eea23e4aSMarek Szyprowski #size-cells = <2>; 101eea23e4aSMarek Szyprowski #interrupt-cells = <1>; 102eea23e4aSMarek Szyprowski device_type = "pci"; 103eea23e4aSMarek Szyprowski interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>; 104eea23e4aSMarek Szyprowski clocks = <&cmu_fsys CLK_PCIE>, <&cmu_fsys CLK_PCLK_PCIE_PHY>; 105eea23e4aSMarek Szyprowski clock-names = "pcie", "pcie_bus"; 106eea23e4aSMarek Szyprowski phys = <&pcie_phy>; 107eea23e4aSMarek Szyprowski pinctrl-0 = <&pcie_bus &pcie_wlanen>; 108eea23e4aSMarek Szyprowski pinctrl-names = "default"; 109eea23e4aSMarek Szyprowski num-lanes = <1>; 110eea23e4aSMarek Szyprowski num-viewport = <3>; 111eea23e4aSMarek Szyprowski bus-range = <0x00 0xff>; 112eea23e4aSMarek Szyprowski ranges = <0x81000000 0 0 0x0c001000 0 0x00010000>, 113eea23e4aSMarek Szyprowski <0x82000000 0 0x0c011000 0x0c011000 0 0x03feefff>; 114eea23e4aSMarek Szyprowski vdd10-supply = <&ldo6_reg>; 115eea23e4aSMarek Szyprowski vdd18-supply = <&ldo7_reg>; 116eea23e4aSMarek Szyprowski interrupt-map-mask = <0 0 0 0>; 117eea23e4aSMarek Szyprowski interrupt-map = <0 0 0 0 &gic GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>; 118eea23e4aSMarek Szyprowski }; 119eea23e4aSMarek Szyprowski... 120