1409ae431SHerve Codina# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2409ae431SHerve Codina%YAML 1.2
3409ae431SHerve Codina---
4409ae431SHerve Codina$id: http://devicetree.org/schemas/pci/renesas,pci-rcar-gen2.yaml#
5409ae431SHerve Codina$schema: http://devicetree.org/meta-schemas/core.yaml#
6409ae431SHerve Codina
7409ae431SHerve Codinatitle: Renesas AHB to PCI bridge
8409ae431SHerve Codina
9409ae431SHerve Codinamaintainers:
10409ae431SHerve Codina  - Marek Vasut <marek.vasut+renesas@gmail.com>
11409ae431SHerve Codina  - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
12409ae431SHerve Codina
13409ae431SHerve Codinadescription: |
14409ae431SHerve Codina  This is the bridge used internally to connect the USB controllers to the
15409ae431SHerve Codina  AHB. There is one bridge instance per USB port connected to the internal
16409ae431SHerve Codina  OHCI and EHCI controllers.
17409ae431SHerve Codina
18409ae431SHerve Codinaproperties:
19409ae431SHerve Codina  compatible:
20409ae431SHerve Codina    oneOf:
21409ae431SHerve Codina      - items:
22409ae431SHerve Codina          - enum:
23409ae431SHerve Codina              - renesas,pci-r8a7742      # RZ/G1H
24409ae431SHerve Codina              - renesas,pci-r8a7743      # RZ/G1M
25409ae431SHerve Codina              - renesas,pci-r8a7744      # RZ/G1N
26409ae431SHerve Codina              - renesas,pci-r8a7745      # RZ/G1E
27409ae431SHerve Codina              - renesas,pci-r8a7790      # R-Car H2
28409ae431SHerve Codina              - renesas,pci-r8a7791      # R-Car M2-W
29409ae431SHerve Codina              - renesas,pci-r8a7793      # R-Car M2-N
30409ae431SHerve Codina              - renesas,pci-r8a7794      # R-Car E2
31409ae431SHerve Codina          - const: renesas,pci-rcar-gen2 # R-Car Gen2 and RZ/G1
322ed9ae81SHerve Codina      - items:
332ed9ae81SHerve Codina          - enum:
342ed9ae81SHerve Codina              - renesas,pci-r9a06g032     # RZ/N1D
352ed9ae81SHerve Codina          - const: renesas,pci-rzn1       # RZ/N1
36409ae431SHerve Codina
37409ae431SHerve Codina  reg:
38409ae431SHerve Codina    items:
39409ae431SHerve Codina      - description: Operational registers for the OHCI/EHCI controllers.
40409ae431SHerve Codina      - description: Bridge configuration and control registers.
41409ae431SHerve Codina
42409ae431SHerve Codina  interrupts:
43409ae431SHerve Codina    maxItems: 1
44409ae431SHerve Codina
452ed9ae81SHerve Codina  clocks: true
46409ae431SHerve Codina
472ed9ae81SHerve Codina  clock-names: true
48409ae431SHerve Codina
49409ae431SHerve Codina  resets:
50409ae431SHerve Codina    maxItems: 1
51409ae431SHerve Codina
52409ae431SHerve Codina  power-domains:
53409ae431SHerve Codina    maxItems: 1
54409ae431SHerve Codina
55409ae431SHerve Codina  bus-range:
56409ae431SHerve Codina    description: |
57409ae431SHerve Codina      The PCI bus number range; as this is a single bus, the range
58409ae431SHerve Codina      should be specified as the same value twice.
59409ae431SHerve Codina
60409ae431SHerve Codina  dma-ranges:
61409ae431SHerve Codina    description: |
62409ae431SHerve Codina      A single range for the inbound memory region. If not supplied,
63409ae431SHerve Codina      defaults to 1GiB at 0x40000000. Note there are hardware restrictions on
64409ae431SHerve Codina      the allowed combinations of address and size.
65409ae431SHerve Codina    maxItems: 1
66409ae431SHerve Codina
67409ae431SHerve CodinapatternProperties:
68*7621aabdSRob Herring  '^usb@[0-1],0$':
69409ae431SHerve Codina    type: object
70409ae431SHerve Codina
71409ae431SHerve Codina    description:
72409ae431SHerve Codina      This a USB controller PCI device
73409ae431SHerve Codina
74409ae431SHerve Codina    properties:
75409ae431SHerve Codina      reg:
76409ae431SHerve Codina        description:
77409ae431SHerve Codina          Identify the correct bus, device and function number in the
78409ae431SHerve Codina          form <bdf 0 0 0 0>.
79409ae431SHerve Codina
80409ae431SHerve Codina        items:
81409ae431SHerve Codina          minItems: 5
82409ae431SHerve Codina          maxItems: 5
83409ae431SHerve Codina
84409ae431SHerve Codina      phys:
85409ae431SHerve Codina        description:
86409ae431SHerve Codina          Reference to the USB phy
87409ae431SHerve Codina        maxItems: 1
88409ae431SHerve Codina
89409ae431SHerve Codina      phy-names:
90409ae431SHerve Codina        maxItems: 1
91409ae431SHerve Codina
92409ae431SHerve Codina    required:
93409ae431SHerve Codina      - reg
94409ae431SHerve Codina      - phys
95409ae431SHerve Codina      - phy-names
96409ae431SHerve Codina
97409ae431SHerve Codina    unevaluatedProperties: false
98409ae431SHerve Codina
99409ae431SHerve Codinarequired:
100409ae431SHerve Codina  - compatible
101409ae431SHerve Codina  - reg
102409ae431SHerve Codina  - interrupts
103409ae431SHerve Codina  - interrupt-map
104409ae431SHerve Codina  - interrupt-map-mask
105409ae431SHerve Codina  - clocks
106409ae431SHerve Codina  - power-domains
107409ae431SHerve Codina  - bus-range
108409ae431SHerve Codina  - "#address-cells"
109409ae431SHerve Codina  - "#size-cells"
110409ae431SHerve Codina  - "#interrupt-cells"
111409ae431SHerve Codina
1122ed9ae81SHerve CodinaallOf:
1132ed9ae81SHerve Codina  - $ref: /schemas/pci/pci-bus.yaml#
1142ed9ae81SHerve Codina
1152ed9ae81SHerve Codina  - if:
1162ed9ae81SHerve Codina      properties:
1172ed9ae81SHerve Codina        compatible:
1182ed9ae81SHerve Codina          contains:
1192ed9ae81SHerve Codina            enum:
1202ed9ae81SHerve Codina              - renesas,pci-rzn1
1212ed9ae81SHerve Codina    then:
1222ed9ae81SHerve Codina      properties:
1232ed9ae81SHerve Codina        clocks:
1242ed9ae81SHerve Codina          items:
1252ed9ae81SHerve Codina            - description: Internal bus clock (AHB) for HOST
1262ed9ae81SHerve Codina            - description: Internal bus clock (AHB) Power Management
1272ed9ae81SHerve Codina            - description: PCI clock for USB subsystem
1282ed9ae81SHerve Codina        clock-names:
1292ed9ae81SHerve Codina          items:
1302ed9ae81SHerve Codina            - const: hclkh
1312ed9ae81SHerve Codina            - const: hclkpm
1322ed9ae81SHerve Codina            - const: pciclk
1332ed9ae81SHerve Codina      required:
1342ed9ae81SHerve Codina        - clock-names
1352ed9ae81SHerve Codina    else:
1362ed9ae81SHerve Codina      properties:
1372ed9ae81SHerve Codina        clocks:
1382ed9ae81SHerve Codina          items:
1392ed9ae81SHerve Codina            - description: Device clock
1402ed9ae81SHerve Codina        clock-names:
1412ed9ae81SHerve Codina          items:
1422ed9ae81SHerve Codina            - const: pclk
1432ed9ae81SHerve Codina      required:
1442ed9ae81SHerve Codina        - resets
1452ed9ae81SHerve Codina
146409ae431SHerve CodinaunevaluatedProperties: false
147409ae431SHerve Codina
148409ae431SHerve Codinaexamples:
149409ae431SHerve Codina  - |
150409ae431SHerve Codina    #include <dt-bindings/interrupt-controller/arm-gic.h>
151409ae431SHerve Codina    #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
152409ae431SHerve Codina    #include <dt-bindings/power/r8a7790-sysc.h>
153409ae431SHerve Codina
154409ae431SHerve Codina    pci@ee090000  {
155409ae431SHerve Codina        compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
156409ae431SHerve Codina        device_type = "pci";
157409ae431SHerve Codina        reg = <0xee090000 0xc00>,
158409ae431SHerve Codina              <0xee080000 0x1100>;
159409ae431SHerve Codina        clocks = <&cpg CPG_MOD 703>;
160409ae431SHerve Codina        power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
161409ae431SHerve Codina        resets = <&cpg 703>;
162409ae431SHerve Codina        interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
163409ae431SHerve Codina
164409ae431SHerve Codina        bus-range = <0 0>;
165409ae431SHerve Codina        #address-cells = <3>;
166409ae431SHerve Codina        #size-cells = <2>;
167409ae431SHerve Codina        #interrupt-cells = <1>;
168409ae431SHerve Codina        ranges = <0x02000000 0 0xee080000 0xee080000 0 0x00010000>;
169409ae431SHerve Codina        dma-ranges = <0x42000000 0 0x40000000 0x40000000 0 0x40000000>;
170409ae431SHerve Codina        interrupt-map-mask = <0xf800 0 0 0x7>;
171409ae431SHerve Codina        interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
172409ae431SHerve Codina                        <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
173409ae431SHerve Codina                        <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
174409ae431SHerve Codina
175409ae431SHerve Codina        usb@1,0 {
176409ae431SHerve Codina            reg = <0x800 0 0 0 0>;
177409ae431SHerve Codina            phys = <&usb0 0>;
178409ae431SHerve Codina            phy-names = "usb";
179409ae431SHerve Codina        };
180409ae431SHerve Codina
181409ae431SHerve Codina        usb@2,0 {
182409ae431SHerve Codina            reg = <0x1000 0 0 0 0>;
183409ae431SHerve Codina            phys = <&usb0 0>;
184409ae431SHerve Codina            phy-names = "usb";
185409ae431SHerve Codina        };
186409ae431SHerve Codina    };
187