1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright (C) 2020 Renesas Electronics Europe GmbH - https://www.renesas.com/eu/en/
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/pci/rcar-pci-ep.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Renesas R-Car PCIe Endpoint
9
10maintainers:
11  - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
12  - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
13
14properties:
15  compatible:
16    items:
17      - enum:
18          - renesas,r8a774a1-pcie-ep     # RZ/G2M
19          - renesas,r8a774b1-pcie-ep     # RZ/G2N
20          - renesas,r8a774c0-pcie-ep     # RZ/G2E
21          - renesas,r8a774e1-pcie-ep     # RZ/G2H
22      - const: renesas,rcar-gen3-pcie-ep # R-Car Gen3 and RZ/G2
23
24  reg:
25    maxItems: 5
26
27  reg-names:
28    items:
29      - const: apb-base
30      - const: memory0
31      - const: memory1
32      - const: memory2
33      - const: memory3
34
35  power-domains:
36    maxItems: 1
37
38  resets:
39    maxItems: 1
40
41  clocks:
42    maxItems: 1
43
44  clock-names:
45    items:
46      - const: pcie
47
48  max-functions:
49    minimum: 1
50    maximum: 1
51
52required:
53  - compatible
54  - reg
55  - reg-names
56  - resets
57  - power-domains
58  - clocks
59  - clock-names
60  - max-functions
61
62additionalProperties: false
63
64examples:
65  - |
66    #include <dt-bindings/clock/r8a774c0-cpg-mssr.h>
67    #include <dt-bindings/power/r8a774c0-sysc.h>
68
69     pcie0_ep: pcie-ep@fe000000 {
70            compatible = "renesas,r8a774c0-pcie-ep",
71                         "renesas,rcar-gen3-pcie-ep";
72            reg = <0xfe000000 0x80000>,
73                  <0xfe100000 0x100000>,
74                  <0xfe200000 0x200000>,
75                  <0x30000000 0x8000000>,
76                  <0x38000000 0x8000000>;
77            reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
78            resets = <&cpg 319>;
79            power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
80            clocks = <&cpg CPG_MOD 319>;
81            clock-names = "pcie";
82            max-functions = /bits/ 8 <1>;
83    };
84