14c0f8092SLad Prabhakar# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 24c0f8092SLad Prabhakar# Copyright (C) 2020 Renesas Electronics Europe GmbH - https://www.renesas.com/eu/en/ 34c0f8092SLad Prabhakar%YAML 1.2 44c0f8092SLad Prabhakar--- 54c0f8092SLad Prabhakar$id: http://devicetree.org/schemas/pci/rcar-pci-ep.yaml# 64c0f8092SLad Prabhakar$schema: http://devicetree.org/meta-schemas/core.yaml# 74c0f8092SLad Prabhakar 84c0f8092SLad Prabhakartitle: Renesas R-Car PCIe Endpoint 94c0f8092SLad Prabhakar 104c0f8092SLad Prabhakarmaintainers: 114c0f8092SLad Prabhakar - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> 124c0f8092SLad Prabhakar - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> 134c0f8092SLad Prabhakar 144c0f8092SLad Prabhakarproperties: 154c0f8092SLad Prabhakar compatible: 164c0f8092SLad Prabhakar items: 174c0f8092SLad Prabhakar - const: renesas,r8a774c0-pcie-ep 184c0f8092SLad Prabhakar - const: renesas,rcar-gen3-pcie-ep 194c0f8092SLad Prabhakar 204c0f8092SLad Prabhakar reg: 214c0f8092SLad Prabhakar maxItems: 5 224c0f8092SLad Prabhakar 234c0f8092SLad Prabhakar reg-names: 244c0f8092SLad Prabhakar items: 254c0f8092SLad Prabhakar - const: apb-base 264c0f8092SLad Prabhakar - const: memory0 274c0f8092SLad Prabhakar - const: memory1 284c0f8092SLad Prabhakar - const: memory2 294c0f8092SLad Prabhakar - const: memory3 304c0f8092SLad Prabhakar 314c0f8092SLad Prabhakar power-domains: 324c0f8092SLad Prabhakar maxItems: 1 334c0f8092SLad Prabhakar 344c0f8092SLad Prabhakar resets: 354c0f8092SLad Prabhakar maxItems: 1 364c0f8092SLad Prabhakar 374c0f8092SLad Prabhakar clocks: 384c0f8092SLad Prabhakar maxItems: 1 394c0f8092SLad Prabhakar 404c0f8092SLad Prabhakar clock-names: 414c0f8092SLad Prabhakar items: 424c0f8092SLad Prabhakar - const: pcie 434c0f8092SLad Prabhakar 444c0f8092SLad Prabhakar max-functions: 454c0f8092SLad Prabhakar minimum: 1 464c0f8092SLad Prabhakar maximum: 1 474c0f8092SLad Prabhakar 484c0f8092SLad Prabhakarrequired: 494c0f8092SLad Prabhakar - compatible 504c0f8092SLad Prabhakar - reg 514c0f8092SLad Prabhakar - reg-names 524c0f8092SLad Prabhakar - resets 534c0f8092SLad Prabhakar - power-domains 544c0f8092SLad Prabhakar - clocks 554c0f8092SLad Prabhakar - clock-names 564c0f8092SLad Prabhakar - max-functions 574c0f8092SLad Prabhakar 584c0f8092SLad Prabhakarexamples: 594c0f8092SLad Prabhakar - | 604c0f8092SLad Prabhakar #include <dt-bindings/clock/r8a774c0-cpg-mssr.h> 614c0f8092SLad Prabhakar #include <dt-bindings/power/r8a774c0-sysc.h> 624c0f8092SLad Prabhakar 634c0f8092SLad Prabhakar pcie0_ep: pcie-ep@fe000000 { 644c0f8092SLad Prabhakar compatible = "renesas,r8a774c0-pcie-ep", 654c0f8092SLad Prabhakar "renesas,rcar-gen3-pcie-ep"; 664c0f8092SLad Prabhakar reg = <0xfe000000 0x80000>, 674c0f8092SLad Prabhakar <0xfe100000 0x100000>, 684c0f8092SLad Prabhakar <0xfe200000 0x200000>, 694c0f8092SLad Prabhakar <0x30000000 0x8000000>, 704c0f8092SLad Prabhakar <0x38000000 0x8000000>; 714c0f8092SLad Prabhakar reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; 724c0f8092SLad Prabhakar resets = <&cpg 319>; 734c0f8092SLad Prabhakar power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 744c0f8092SLad Prabhakar clocks = <&cpg CPG_MOD 319>; 754c0f8092SLad Prabhakar clock-names = "pcie"; 764c0f8092SLad Prabhakar max-functions = /bits/ 8 <1>; 774c0f8092SLad Prabhakar }; 78