1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pci/qcom,pcie.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm PCI express root complex 8 9maintainers: 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 12 13description: | 14 Qualcomm PCIe root complex controller is based on the Synopsys DesignWare 15 PCIe IP. 16 17properties: 18 compatible: 19 oneOf: 20 - enum: 21 - qcom,pcie-apq8064 22 - qcom,pcie-apq8084 23 - qcom,pcie-ipq4019 24 - qcom,pcie-ipq6018 25 - qcom,pcie-ipq8064 26 - qcom,pcie-ipq8064-v2 27 - qcom,pcie-ipq8074 28 - qcom,pcie-ipq8074-gen3 29 - qcom,pcie-msm8996 30 - qcom,pcie-qcs404 31 - qcom,pcie-sa8540p 32 - qcom,pcie-sa8775p 33 - qcom,pcie-sc7280 34 - qcom,pcie-sc8180x 35 - qcom,pcie-sc8280xp 36 - qcom,pcie-sdm845 37 - qcom,pcie-sdx55 38 - qcom,pcie-sm8150 39 - qcom,pcie-sm8250 40 - qcom,pcie-sm8350 41 - qcom,pcie-sm8450-pcie0 42 - qcom,pcie-sm8450-pcie1 43 - qcom,pcie-sm8550 44 - items: 45 - const: qcom,pcie-msm8998 46 - const: qcom,pcie-msm8996 47 48 reg: 49 minItems: 4 50 maxItems: 6 51 52 reg-names: 53 minItems: 4 54 maxItems: 6 55 56 interrupts: 57 minItems: 1 58 maxItems: 8 59 60 interrupt-names: 61 minItems: 1 62 maxItems: 8 63 64 iommu-map: 65 maxItems: 2 66 67 # Common definitions for clocks, clock-names and reset. 68 # Platform constraints are described later. 69 clocks: 70 minItems: 3 71 maxItems: 13 72 73 clock-names: 74 minItems: 3 75 maxItems: 13 76 77 dma-coherent: true 78 79 interconnects: 80 maxItems: 2 81 82 interconnect-names: 83 items: 84 - const: pcie-mem 85 - const: cpu-pcie 86 87 resets: 88 minItems: 1 89 maxItems: 12 90 91 resets-names: 92 minItems: 1 93 maxItems: 12 94 95 vdda-supply: 96 description: A phandle to the core analog power supply 97 98 vdda_phy-supply: 99 description: A phandle to the core analog power supply for PHY 100 101 vdda_refclk-supply: 102 description: A phandle to the core analog power supply for IC which generates reference clock 103 104 vddpe-3v3-supply: 105 description: A phandle to the PCIe endpoint power supply 106 107 phys: 108 maxItems: 1 109 110 phy-names: 111 items: 112 - const: pciephy 113 114 power-domains: 115 maxItems: 1 116 117 perst-gpios: 118 description: GPIO controlled connection to PERST# signal 119 maxItems: 1 120 121 wake-gpios: 122 description: GPIO controlled connection to WAKE# signal 123 maxItems: 1 124 125required: 126 - compatible 127 - reg 128 - reg-names 129 - interrupt-map-mask 130 - interrupt-map 131 - clocks 132 - clock-names 133 134anyOf: 135 - required: 136 - interrupts 137 - interrupt-names 138 - "#interrupt-cells" 139 - required: 140 - msi-map 141 - msi-map-mask 142 143allOf: 144 - $ref: /schemas/pci/pci-bus.yaml# 145 - if: 146 properties: 147 compatible: 148 contains: 149 enum: 150 - qcom,pcie-apq8064 151 - qcom,pcie-ipq4019 152 - qcom,pcie-ipq8064 153 - qcom,pcie-ipq8064v2 154 - qcom,pcie-ipq8074 155 - qcom,pcie-qcs404 156 then: 157 properties: 158 reg: 159 minItems: 4 160 maxItems: 4 161 reg-names: 162 items: 163 - const: dbi # DesignWare PCIe registers 164 - const: elbi # External local bus interface registers 165 - const: parf # Qualcomm specific registers 166 - const: config # PCIe configuration space 167 168 - if: 169 properties: 170 compatible: 171 contains: 172 enum: 173 - qcom,pcie-ipq6018 174 - qcom,pcie-ipq8074-gen3 175 then: 176 properties: 177 reg: 178 minItems: 5 179 maxItems: 5 180 reg-names: 181 items: 182 - const: dbi # DesignWare PCIe registers 183 - const: elbi # External local bus interface registers 184 - const: atu # ATU address space 185 - const: parf # Qualcomm specific registers 186 - const: config # PCIe configuration space 187 188 - if: 189 properties: 190 compatible: 191 contains: 192 enum: 193 - qcom,pcie-apq8084 194 - qcom,pcie-msm8996 195 - qcom,pcie-sdm845 196 then: 197 properties: 198 reg: 199 minItems: 4 200 maxItems: 5 201 reg-names: 202 minItems: 4 203 items: 204 - const: parf # Qualcomm specific registers 205 - const: dbi # DesignWare PCIe registers 206 - const: elbi # External local bus interface registers 207 - const: config # PCIe configuration space 208 - const: mhi # MHI registers 209 210 - if: 211 properties: 212 compatible: 213 contains: 214 enum: 215 - qcom,pcie-sa8775p 216 - qcom,pcie-sc7280 217 - qcom,pcie-sc8180x 218 - qcom,pcie-sc8280xp 219 - qcom,pcie-sdx55 220 - qcom,pcie-sm8250 221 - qcom,pcie-sm8350 222 - qcom,pcie-sm8450-pcie0 223 - qcom,pcie-sm8450-pcie1 224 - qcom,pcie-sm8550 225 then: 226 properties: 227 reg: 228 minItems: 5 229 maxItems: 6 230 reg-names: 231 minItems: 5 232 items: 233 - const: parf # Qualcomm specific registers 234 - const: dbi # DesignWare PCIe registers 235 - const: elbi # External local bus interface registers 236 - const: atu # ATU address space 237 - const: config # PCIe configuration space 238 - const: mhi # MHI registers 239 240 - if: 241 properties: 242 compatible: 243 contains: 244 enum: 245 - qcom,pcie-apq8064 246 - qcom,pcie-ipq8064 247 - qcom,pcie-ipq8064v2 248 then: 249 properties: 250 clocks: 251 minItems: 3 252 maxItems: 5 253 clock-names: 254 minItems: 3 255 items: 256 - const: core # Clocks the pcie hw block 257 - const: iface # Configuration AHB clock 258 - const: phy # Clocks the pcie PHY block 259 - const: aux # Clocks the pcie AUX block, not on apq8064 260 - const: ref # Clocks the pcie ref block, not on apq8064 261 resets: 262 minItems: 5 263 maxItems: 6 264 reset-names: 265 minItems: 5 266 items: 267 - const: axi # AXI reset 268 - const: ahb # AHB reset 269 - const: por # POR reset 270 - const: pci # PCI reset 271 - const: phy # PHY reset 272 - const: ext # EXT reset, not on apq8064 273 required: 274 - vdda-supply 275 - vdda_phy-supply 276 - vdda_refclk-supply 277 278 - if: 279 properties: 280 compatible: 281 contains: 282 enum: 283 - qcom,pcie-apq8084 284 then: 285 properties: 286 clocks: 287 minItems: 4 288 maxItems: 4 289 clock-names: 290 items: 291 - const: iface # Configuration AHB clock 292 - const: master_bus # Master AXI clock 293 - const: slave_bus # Slave AXI clock 294 - const: aux # Auxiliary (AUX) clock 295 resets: 296 maxItems: 1 297 reset-names: 298 items: 299 - const: core # Core reset 300 301 - if: 302 properties: 303 compatible: 304 contains: 305 enum: 306 - qcom,pcie-ipq4019 307 then: 308 properties: 309 clocks: 310 minItems: 3 311 maxItems: 3 312 clock-names: 313 items: 314 - const: aux # Auxiliary (AUX) clock 315 - const: master_bus # Master AXI clock 316 - const: slave_bus # Slave AXI clock 317 resets: 318 minItems: 12 319 maxItems: 12 320 reset-names: 321 items: 322 - const: axi_m # AXI master reset 323 - const: axi_s # AXI slave reset 324 - const: pipe # PIPE reset 325 - const: axi_m_vmid # VMID reset 326 - const: axi_s_xpu # XPU reset 327 - const: parf # PARF reset 328 - const: phy # PHY reset 329 - const: axi_m_sticky # AXI sticky reset 330 - const: pipe_sticky # PIPE sticky reset 331 - const: pwr # PWR reset 332 - const: ahb # AHB reset 333 - const: phy_ahb # PHY AHB reset 334 335 - if: 336 properties: 337 compatible: 338 contains: 339 enum: 340 - qcom,pcie-msm8996 341 then: 342 properties: 343 clocks: 344 minItems: 5 345 maxItems: 5 346 clock-names: 347 items: 348 - const: pipe # Pipe Clock driving internal logic 349 - const: aux # Auxiliary (AUX) clock 350 - const: cfg # Configuration clock 351 - const: bus_master # Master AXI clock 352 - const: bus_slave # Slave AXI clock 353 resets: false 354 reset-names: false 355 356 - if: 357 properties: 358 compatible: 359 contains: 360 enum: 361 - qcom,pcie-ipq8074 362 then: 363 properties: 364 clocks: 365 minItems: 5 366 maxItems: 5 367 clock-names: 368 items: 369 - const: iface # PCIe to SysNOC BIU clock 370 - const: axi_m # AXI Master clock 371 - const: axi_s # AXI Slave clock 372 - const: ahb # AHB clock 373 - const: aux # Auxiliary clock 374 resets: 375 minItems: 7 376 maxItems: 7 377 reset-names: 378 items: 379 - const: pipe # PIPE reset 380 - const: sleep # Sleep reset 381 - const: sticky # Core Sticky reset 382 - const: axi_m # AXI Master reset 383 - const: axi_s # AXI Slave reset 384 - const: ahb # AHB Reset 385 - const: axi_m_sticky # AXI Master Sticky reset 386 387 - if: 388 properties: 389 compatible: 390 contains: 391 enum: 392 - qcom,pcie-ipq6018 393 - qcom,pcie-ipq8074-gen3 394 then: 395 properties: 396 clocks: 397 minItems: 5 398 maxItems: 5 399 clock-names: 400 items: 401 - const: iface # PCIe to SysNOC BIU clock 402 - const: axi_m # AXI Master clock 403 - const: axi_s # AXI Slave clock 404 - const: axi_bridge # AXI bridge clock 405 - const: rchng 406 resets: 407 minItems: 8 408 maxItems: 8 409 reset-names: 410 items: 411 - const: pipe # PIPE reset 412 - const: sleep # Sleep reset 413 - const: sticky # Core Sticky reset 414 - const: axi_m # AXI Master reset 415 - const: axi_s # AXI Slave reset 416 - const: ahb # AHB Reset 417 - const: axi_m_sticky # AXI Master Sticky reset 418 - const: axi_s_sticky # AXI Slave Sticky reset 419 420 - if: 421 properties: 422 compatible: 423 contains: 424 enum: 425 - qcom,pcie-qcs404 426 then: 427 properties: 428 clocks: 429 minItems: 4 430 maxItems: 4 431 clock-names: 432 items: 433 - const: iface # AHB clock 434 - const: aux # Auxiliary clock 435 - const: master_bus # AXI Master clock 436 - const: slave_bus # AXI Slave clock 437 resets: 438 minItems: 6 439 maxItems: 6 440 reset-names: 441 items: 442 - const: axi_m # AXI Master reset 443 - const: axi_s # AXI Slave reset 444 - const: axi_m_sticky # AXI Master Sticky reset 445 - const: pipe_sticky # PIPE sticky reset 446 - const: pwr # PWR reset 447 - const: ahb # AHB reset 448 449 - if: 450 properties: 451 compatible: 452 contains: 453 enum: 454 - qcom,pcie-sc7280 455 then: 456 properties: 457 clocks: 458 minItems: 13 459 maxItems: 13 460 clock-names: 461 items: 462 - const: pipe # PIPE clock 463 - const: pipe_mux # PIPE MUX 464 - const: phy_pipe # PIPE output clock 465 - const: ref # REFERENCE clock 466 - const: aux # Auxiliary clock 467 - const: cfg # Configuration clock 468 - const: bus_master # Master AXI clock 469 - const: bus_slave # Slave AXI clock 470 - const: slave_q2a # Slave Q2A clock 471 - const: tbu # PCIe TBU clock 472 - const: ddrss_sf_tbu # PCIe SF TBU clock 473 - const: aggre0 # Aggre NoC PCIe CENTER SF AXI clock 474 - const: aggre1 # Aggre NoC PCIe1 AXI clock 475 resets: 476 maxItems: 1 477 reset-names: 478 items: 479 - const: pci # PCIe core reset 480 481 - if: 482 properties: 483 compatible: 484 contains: 485 enum: 486 - qcom,pcie-sdm845 487 then: 488 oneOf: 489 # Unfortunately the "optional" ref clock is used in the middle of the list 490 - properties: 491 clocks: 492 minItems: 8 493 maxItems: 8 494 clock-names: 495 items: 496 - const: pipe # PIPE clock 497 - const: aux # Auxiliary clock 498 - const: cfg # Configuration clock 499 - const: bus_master # Master AXI clock 500 - const: bus_slave # Slave AXI clock 501 - const: slave_q2a # Slave Q2A clock 502 - const: ref # REFERENCE clock 503 - const: tbu # PCIe TBU clock 504 - properties: 505 clocks: 506 minItems: 7 507 maxItems: 7 508 clock-names: 509 items: 510 - const: pipe # PIPE clock 511 - const: aux # Auxiliary clock 512 - const: cfg # Configuration clock 513 - const: bus_master # Master AXI clock 514 - const: bus_slave # Slave AXI clock 515 - const: slave_q2a # Slave Q2A clock 516 - const: tbu # PCIe TBU clock 517 properties: 518 resets: 519 maxItems: 1 520 reset-names: 521 items: 522 - const: pci # PCIe core reset 523 524 - if: 525 properties: 526 compatible: 527 contains: 528 enum: 529 - qcom,pcie-sc8180x 530 - qcom,pcie-sm8150 531 - qcom,pcie-sm8250 532 then: 533 oneOf: 534 # Unfortunately the "optional" ref clock is used in the middle of the list 535 - properties: 536 clocks: 537 minItems: 9 538 maxItems: 9 539 clock-names: 540 items: 541 - const: pipe # PIPE clock 542 - const: aux # Auxiliary clock 543 - const: cfg # Configuration clock 544 - const: bus_master # Master AXI clock 545 - const: bus_slave # Slave AXI clock 546 - const: slave_q2a # Slave Q2A clock 547 - const: ref # REFERENCE clock 548 - const: tbu # PCIe TBU clock 549 - const: ddrss_sf_tbu # PCIe SF TBU clock 550 - properties: 551 clocks: 552 minItems: 8 553 maxItems: 8 554 clock-names: 555 items: 556 - const: pipe # PIPE clock 557 - const: aux # Auxiliary clock 558 - const: cfg # Configuration clock 559 - const: bus_master # Master AXI clock 560 - const: bus_slave # Slave AXI clock 561 - const: slave_q2a # Slave Q2A clock 562 - const: tbu # PCIe TBU clock 563 - const: ddrss_sf_tbu # PCIe SF TBU clock 564 properties: 565 resets: 566 maxItems: 1 567 reset-names: 568 items: 569 - const: pci # PCIe core reset 570 571 - if: 572 properties: 573 compatible: 574 contains: 575 enum: 576 - qcom,pcie-sm8350 577 then: 578 properties: 579 clocks: 580 minItems: 8 581 maxItems: 9 582 clock-names: 583 minItems: 8 584 items: 585 - const: aux # Auxiliary clock 586 - const: cfg # Configuration clock 587 - const: bus_master # Master AXI clock 588 - const: bus_slave # Slave AXI clock 589 - const: slave_q2a # Slave Q2A clock 590 - const: tbu # PCIe TBU clock 591 - const: ddrss_sf_tbu # PCIe SF TBU clock 592 - const: aggre1 # Aggre NoC PCIe1 AXI clock 593 - const: aggre0 # Aggre NoC PCIe0 AXI clock 594 resets: 595 maxItems: 1 596 reset-names: 597 items: 598 - const: pci # PCIe core reset 599 600 - if: 601 properties: 602 compatible: 603 contains: 604 enum: 605 - qcom,pcie-sm8450-pcie0 606 then: 607 properties: 608 clocks: 609 minItems: 12 610 maxItems: 12 611 clock-names: 612 items: 613 - const: pipe # PIPE clock 614 - const: pipe_mux # PIPE MUX 615 - const: phy_pipe # PIPE output clock 616 - const: ref # REFERENCE clock 617 - const: aux # Auxiliary clock 618 - const: cfg # Configuration clock 619 - const: bus_master # Master AXI clock 620 - const: bus_slave # Slave AXI clock 621 - const: slave_q2a # Slave Q2A clock 622 - const: ddrss_sf_tbu # PCIe SF TBU clock 623 - const: aggre0 # Aggre NoC PCIe0 AXI clock 624 - const: aggre1 # Aggre NoC PCIe1 AXI clock 625 resets: 626 maxItems: 1 627 reset-names: 628 items: 629 - const: pci # PCIe core reset 630 631 - if: 632 properties: 633 compatible: 634 contains: 635 enum: 636 - qcom,pcie-sm8450-pcie1 637 then: 638 properties: 639 clocks: 640 minItems: 11 641 maxItems: 11 642 clock-names: 643 items: 644 - const: pipe # PIPE clock 645 - const: pipe_mux # PIPE MUX 646 - const: phy_pipe # PIPE output clock 647 - const: ref # REFERENCE clock 648 - const: aux # Auxiliary clock 649 - const: cfg # Configuration clock 650 - const: bus_master # Master AXI clock 651 - const: bus_slave # Slave AXI clock 652 - const: slave_q2a # Slave Q2A clock 653 - const: ddrss_sf_tbu # PCIe SF TBU clock 654 - const: aggre1 # Aggre NoC PCIe1 AXI clock 655 resets: 656 maxItems: 1 657 reset-names: 658 items: 659 - const: pci # PCIe core reset 660 661 - if: 662 properties: 663 compatible: 664 contains: 665 enum: 666 - qcom,pcie-sm8550 667 then: 668 properties: 669 clocks: 670 minItems: 7 671 maxItems: 8 672 clock-names: 673 minItems: 7 674 items: 675 - const: aux # Auxiliary clock 676 - const: cfg # Configuration clock 677 - const: bus_master # Master AXI clock 678 - const: bus_slave # Slave AXI clock 679 - const: slave_q2a # Slave Q2A clock 680 - const: ddrss_sf_tbu # PCIe SF TBU clock 681 - const: noc_aggr # Aggre NoC PCIe AXI clock 682 - const: cnoc_sf_axi # Config NoC PCIe1 AXI clock 683 resets: 684 minItems: 1 685 maxItems: 2 686 reset-names: 687 minItems: 1 688 items: 689 - const: pci # PCIe core reset 690 - const: link_down # PCIe link down reset 691 692 - if: 693 properties: 694 compatible: 695 contains: 696 enum: 697 - qcom,pcie-sa8540p 698 - qcom,pcie-sc8280xp 699 then: 700 properties: 701 clocks: 702 minItems: 8 703 maxItems: 9 704 clock-names: 705 minItems: 8 706 items: 707 - const: aux # Auxiliary clock 708 - const: cfg # Configuration clock 709 - const: bus_master # Master AXI clock 710 - const: bus_slave # Slave AXI clock 711 - const: slave_q2a # Slave Q2A clock 712 - const: ddrss_sf_tbu # PCIe SF TBU clock 713 - const: noc_aggr_4 # NoC aggregate 4 clock 714 - const: noc_aggr_south_sf # NoC aggregate South SF clock 715 - const: cnoc_qx # Configuration NoC QX clock 716 resets: 717 maxItems: 1 718 reset-names: 719 items: 720 - const: pci # PCIe core reset 721 722 - if: 723 properties: 724 compatible: 725 contains: 726 enum: 727 - qcom,pcie-sdx55 728 then: 729 properties: 730 clocks: 731 minItems: 7 732 maxItems: 7 733 clock-names: 734 items: 735 - const: pipe # PIPE clock 736 - const: aux # Auxiliary clock 737 - const: cfg # Configuration clock 738 - const: bus_master # Master AXI clock 739 - const: bus_slave # Slave AXI clock 740 - const: slave_q2a # Slave Q2A clock 741 - const: sleep # PCIe Sleep clock 742 resets: 743 maxItems: 1 744 reset-names: 745 items: 746 - const: pci # PCIe core reset 747 748 - if: 749 properties: 750 compatible: 751 contains: 752 enum: 753 - qcom,pcie-sa8775p 754 then: 755 properties: 756 clocks: 757 minItems: 5 758 maxItems: 5 759 clock-names: 760 items: 761 - const: aux # Auxiliary clock 762 - const: cfg # Configuration clock 763 - const: bus_master # Master AXI clock 764 - const: bus_slave # Slave AXI clock 765 - const: slave_q2a # Slave Q2A clock 766 resets: 767 maxItems: 1 768 reset-names: 769 items: 770 - const: pci # PCIe core reset 771 772 - if: 773 properties: 774 compatible: 775 contains: 776 enum: 777 - qcom,pcie-sa8540p 778 - qcom,pcie-sa8775p 779 - qcom,pcie-sc8280xp 780 then: 781 required: 782 - interconnects 783 - interconnect-names 784 785 - if: 786 not: 787 properties: 788 compatible: 789 contains: 790 enum: 791 - qcom,pcie-apq8064 792 - qcom,pcie-ipq4019 793 - qcom,pcie-ipq8064 794 - qcom,pcie-ipq8064v2 795 - qcom,pcie-ipq8074 796 - qcom,pcie-ipq8074-gen3 797 - qcom,pcie-qcs404 798 then: 799 required: 800 - power-domains 801 802 - if: 803 not: 804 properties: 805 compatible: 806 contains: 807 enum: 808 - qcom,pcie-msm8996 809 then: 810 required: 811 - resets 812 - reset-names 813 814 - if: 815 properties: 816 compatible: 817 contains: 818 enum: 819 - qcom,pcie-msm8996 820 - qcom,pcie-sa8775p 821 - qcom,pcie-sc7280 822 - qcom,pcie-sc8180x 823 - qcom,pcie-sdm845 824 - qcom,pcie-sm8150 825 - qcom,pcie-sm8250 826 - qcom,pcie-sm8350 827 - qcom,pcie-sm8450-pcie0 828 - qcom,pcie-sm8450-pcie1 829 - qcom,pcie-sm8550 830 then: 831 oneOf: 832 - properties: 833 interrupts: 834 maxItems: 1 835 interrupt-names: 836 items: 837 - const: msi 838 - properties: 839 interrupts: 840 minItems: 8 841 interrupt-names: 842 items: 843 - const: msi0 844 - const: msi1 845 - const: msi2 846 - const: msi3 847 - const: msi4 848 - const: msi5 849 - const: msi6 850 - const: msi7 851 852 - if: 853 properties: 854 compatible: 855 contains: 856 enum: 857 - qcom,pcie-sc8280xp 858 then: 859 properties: 860 interrupts: 861 minItems: 4 862 maxItems: 4 863 interrupt-names: 864 items: 865 - const: msi0 866 - const: msi1 867 - const: msi2 868 - const: msi3 869 870 - if: 871 properties: 872 compatible: 873 contains: 874 enum: 875 - qcom,pcie-apq8064 876 - qcom,pcie-apq8084 877 - qcom,pcie-ipq4019 878 - qcom,pcie-ipq6018 879 - qcom,pcie-ipq8064 880 - qcom,pcie-ipq8064-v2 881 - qcom,pcie-ipq8074 882 - qcom,pcie-ipq8074-gen3 883 - qcom,pcie-qcs404 884 - qcom,pcie-sa8540p 885 then: 886 properties: 887 interrupts: 888 maxItems: 1 889 interrupt-names: 890 items: 891 - const: msi 892 893unevaluatedProperties: false 894 895examples: 896 - | 897 #include <dt-bindings/interrupt-controller/arm-gic.h> 898 pcie@1b500000 { 899 compatible = "qcom,pcie-ipq8064"; 900 reg = <0x1b500000 0x1000>, 901 <0x1b502000 0x80>, 902 <0x1b600000 0x100>, 903 <0x0ff00000 0x100000>; 904 reg-names = "dbi", "elbi", "parf", "config"; 905 device_type = "pci"; 906 linux,pci-domain = <0>; 907 bus-range = <0x00 0xff>; 908 num-lanes = <1>; 909 #address-cells = <3>; 910 #size-cells = <2>; 911 ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000>, 912 <0x82000000 0 0 0x08000000 0 0x07e00000>; 913 interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>; 914 interrupt-names = "msi"; 915 #interrupt-cells = <1>; 916 interrupt-map-mask = <0 0 0 0x7>; 917 interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>, 918 <0 0 0 2 &intc 0 37 IRQ_TYPE_LEVEL_HIGH>, 919 <0 0 0 3 &intc 0 38 IRQ_TYPE_LEVEL_HIGH>, 920 <0 0 0 4 &intc 0 39 IRQ_TYPE_LEVEL_HIGH>; 921 clocks = <&gcc 41>, 922 <&gcc 43>, 923 <&gcc 44>, 924 <&gcc 42>, 925 <&gcc 248>; 926 clock-names = "core", "iface", "phy", "aux", "ref"; 927 resets = <&gcc 27>, 928 <&gcc 26>, 929 <&gcc 25>, 930 <&gcc 24>, 931 <&gcc 23>, 932 <&gcc 22>; 933 reset-names = "axi", "ahb", "por", "pci", "phy", "ext"; 934 pinctrl-0 = <&pcie_pins_default>; 935 pinctrl-names = "default"; 936 vdda-supply = <&pm8921_s3>; 937 vdda_phy-supply = <&pm8921_lvs6>; 938 vdda_refclk-supply = <&ext_3p3v>; 939 }; 940 - | 941 #include <dt-bindings/interrupt-controller/arm-gic.h> 942 #include <dt-bindings/gpio/gpio.h> 943 pcie@fc520000 { 944 compatible = "qcom,pcie-apq8084"; 945 reg = <0xfc520000 0x2000>, 946 <0xff000000 0x1000>, 947 <0xff001000 0x1000>, 948 <0xff002000 0x2000>; 949 reg-names = "parf", "dbi", "elbi", "config"; 950 device_type = "pci"; 951 linux,pci-domain = <0>; 952 bus-range = <0x00 0xff>; 953 num-lanes = <1>; 954 #address-cells = <3>; 955 #size-cells = <2>; 956 ranges = <0x81000000 0 0 0xff200000 0 0x00100000>, 957 <0x82000000 0 0x00300000 0xff300000 0 0x00d00000>; 958 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; 959 interrupt-names = "msi"; 960 #interrupt-cells = <1>; 961 interrupt-map-mask = <0 0 0 0x7>; 962 interrupt-map = <0 0 0 1 &intc 0 244 IRQ_TYPE_LEVEL_HIGH>, 963 <0 0 0 2 &intc 0 245 IRQ_TYPE_LEVEL_HIGH>, 964 <0 0 0 3 &intc 0 247 IRQ_TYPE_LEVEL_HIGH>, 965 <0 0 0 4 &intc 0 248 IRQ_TYPE_LEVEL_HIGH>; 966 clocks = <&gcc 324>, 967 <&gcc 325>, 968 <&gcc 327>, 969 <&gcc 323>; 970 clock-names = "iface", "master_bus", "slave_bus", "aux"; 971 resets = <&gcc 81>; 972 reset-names = "core"; 973 power-domains = <&gcc 1>; 974 vdda-supply = <&pma8084_l3>; 975 phys = <&pciephy0>; 976 phy-names = "pciephy"; 977 perst-gpios = <&tlmm 70 GPIO_ACTIVE_LOW>; 978 pinctrl-0 = <&pcie0_pins_default>; 979 pinctrl-names = "default"; 980 }; 981... 982