1PCI bus bridges have standardized Device Tree bindings:
2
3PCI Bus Binding to: IEEE Std 1275-1994
4http://www.firmware.org/1275/bindings/pci/pci2_1.pdf
5
6And for the interrupt mapping part:
7
8Open Firmware Recommended Practice: Interrupt Mapping
9http://www.firmware.org/1275/practice/imap/imap0_9d.pdf
10
11Additionally to the properties specified in the above standards a host bridge
12driver implementation may support the following properties:
13
14- linux,pci-domain:
15   If present this property assigns a fixed PCI domain number to a host bridge,
16   otherwise an unstable (across boots) unique number will be assigned.
17   It is required to either not set this property at all or set it for all
18   host bridges in the system, otherwise potentially conflicting domain numbers
19   may be assigned to root buses behind different host bridges.  The domain
20   number for each host bridge in the system must be unique.
21- max-link-speed:
22   If present this property specifies PCI gen for link capability.  Host
23   drivers could add this as a strategy to avoid unnecessary operation for
24   unsupported link speed, for instance, trying to do training for
25   unsupported link speed, etc.  Must be '4' for gen4, '3' for gen3, '2'
26   for gen2, and '1' for gen1. Any other values are invalid.
27