16ee6c89aSDaire McNamara# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 26ee6c89aSDaire McNamara%YAML 1.2 36ee6c89aSDaire McNamara--- 46ee6c89aSDaire McNamara$id: http://devicetree.org/schemas/pci/microchip,pcie-host.yaml# 56ee6c89aSDaire McNamara$schema: http://devicetree.org/meta-schemas/core.yaml# 66ee6c89aSDaire McNamara 76ee6c89aSDaire McNamaratitle: Microchip PCIe Root Port Bridge Controller Device Tree Bindings 86ee6c89aSDaire McNamara 96ee6c89aSDaire McNamaramaintainers: 106ee6c89aSDaire McNamara - Daire McNamara <daire.mcnamara@microchip.com> 116ee6c89aSDaire McNamara 126ee6c89aSDaire McNamaraallOf: 136ee6c89aSDaire McNamara - $ref: /schemas/pci/pci-bus.yaml# 142e8b4b6eSMark Kettenis - $ref: /schemas/interrupt-controller/msi-controller.yaml# 156ee6c89aSDaire McNamara 166ee6c89aSDaire McNamaraproperties: 176ee6c89aSDaire McNamara compatible: 186ee6c89aSDaire McNamara const: microchip,pcie-host-1.0 # PolarFire 196ee6c89aSDaire McNamara 206ee6c89aSDaire McNamara reg: 216ee6c89aSDaire McNamara maxItems: 2 226ee6c89aSDaire McNamara 236ee6c89aSDaire McNamara reg-names: 246ee6c89aSDaire McNamara items: 256ee6c89aSDaire McNamara - const: cfg 266ee6c89aSDaire McNamara - const: apb 276ee6c89aSDaire McNamara 286ee6c89aSDaire McNamara interrupts: 296ee6c89aSDaire McNamara minItems: 1 306ee6c89aSDaire McNamara items: 316ee6c89aSDaire McNamara - description: PCIe host controller 326ee6c89aSDaire McNamara - description: builtin MSI controller 336ee6c89aSDaire McNamara 346ee6c89aSDaire McNamara interrupt-names: 356ee6c89aSDaire McNamara minItems: 1 366ee6c89aSDaire McNamara items: 376ee6c89aSDaire McNamara - const: pcie 386ee6c89aSDaire McNamara - const: msi 396ee6c89aSDaire McNamara 406ee6c89aSDaire McNamara ranges: 416ee6c89aSDaire McNamara maxItems: 1 426ee6c89aSDaire McNamara 436ee6c89aSDaire McNamara msi-controller: 446ee6c89aSDaire McNamara description: Identifies the node as an MSI controller. 456ee6c89aSDaire McNamara 466ee6c89aSDaire McNamara msi-parent: 476ee6c89aSDaire McNamara description: MSI controller the device is capable of using. 486ee6c89aSDaire McNamara 49*dcd49679SRob Herring interrupt-controller: 50*dcd49679SRob Herring type: object 51*dcd49679SRob Herring properties: 52*dcd49679SRob Herring '#address-cells': 53*dcd49679SRob Herring const: 0 54*dcd49679SRob Herring 55*dcd49679SRob Herring '#interrupt-cells': 56*dcd49679SRob Herring const: 1 57*dcd49679SRob Herring 58*dcd49679SRob Herring interrupt-controller: true 59*dcd49679SRob Herring 60*dcd49679SRob Herring required: 61*dcd49679SRob Herring - '#address-cells' 62*dcd49679SRob Herring - '#interrupt-cells' 63*dcd49679SRob Herring - interrupt-controller 64*dcd49679SRob Herring 65*dcd49679SRob Herring additionalProperties: false 66*dcd49679SRob Herring 676ee6c89aSDaire McNamararequired: 686ee6c89aSDaire McNamara - reg 696ee6c89aSDaire McNamara - reg-names 706ee6c89aSDaire McNamara - "#interrupt-cells" 716ee6c89aSDaire McNamara - interrupts 726ee6c89aSDaire McNamara - interrupt-map-mask 736ee6c89aSDaire McNamara - interrupt-map 746ee6c89aSDaire McNamara - msi-controller 756ee6c89aSDaire McNamara 766ee6c89aSDaire McNamaraunevaluatedProperties: false 776ee6c89aSDaire McNamara 786ee6c89aSDaire McNamaraexamples: 796ee6c89aSDaire McNamara - | 806ee6c89aSDaire McNamara soc { 816ee6c89aSDaire McNamara #address-cells = <2>; 826ee6c89aSDaire McNamara #size-cells = <2>; 836ee6c89aSDaire McNamara pcie0: pcie@2030000000 { 846ee6c89aSDaire McNamara compatible = "microchip,pcie-host-1.0"; 856ee6c89aSDaire McNamara reg = <0x0 0x70000000 0x0 0x08000000>, 866ee6c89aSDaire McNamara <0x0 0x43000000 0x0 0x00010000>; 876ee6c89aSDaire McNamara reg-names = "cfg", "apb"; 886ee6c89aSDaire McNamara device_type = "pci"; 896ee6c89aSDaire McNamara #address-cells = <3>; 906ee6c89aSDaire McNamara #size-cells = <2>; 916ee6c89aSDaire McNamara #interrupt-cells = <1>; 926ee6c89aSDaire McNamara interrupts = <119>; 936ee6c89aSDaire McNamara interrupt-map-mask = <0x0 0x0 0x0 0x7>; 946ee6c89aSDaire McNamara interrupt-map = <0 0 0 1 &pcie_intc0 0>, 956ee6c89aSDaire McNamara <0 0 0 2 &pcie_intc0 1>, 966ee6c89aSDaire McNamara <0 0 0 3 &pcie_intc0 2>, 976ee6c89aSDaire McNamara <0 0 0 4 &pcie_intc0 3>; 986ee6c89aSDaire McNamara interrupt-parent = <&plic0>; 996ee6c89aSDaire McNamara msi-parent = <&pcie0>; 1006ee6c89aSDaire McNamara msi-controller; 1016ee6c89aSDaire McNamara bus-range = <0x00 0x7f>; 1026ee6c89aSDaire McNamara ranges = <0x03000000 0x0 0x78000000 0x0 0x78000000 0x0 0x04000000>; 1036ee6c89aSDaire McNamara pcie_intc0: interrupt-controller { 1046ee6c89aSDaire McNamara #address-cells = <0>; 1056ee6c89aSDaire McNamara #interrupt-cells = <1>; 1066ee6c89aSDaire McNamara interrupt-controller; 1076ee6c89aSDaire McNamara }; 1086ee6c89aSDaire McNamara }; 1096ee6c89aSDaire McNamara }; 110