1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/nvmem/qcom,qfprom.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Technologies Inc, QFPROM Efuse bindings
8
9maintainers:
10  - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
11
12allOf:
13  - $ref: "nvmem.yaml#"
14
15properties:
16  compatible:
17    items:
18      - enum:
19          - qcom,apq8064-qfprom
20          - qcom,apq8084-qfprom
21          - qcom,msm8974-qfprom
22          - qcom,msm8916-qfprom
23          - qcom,msm8996-qfprom
24          - qcom,msm8998-qfprom
25          - qcom,qcs404-qfprom
26          - qcom,sc7180-qfprom
27          - qcom,sdm845-qfprom
28      - const: qcom,qfprom
29
30  reg:
31    # If the QFPROM is read-only OS image then only the corrected region
32    # needs to be provided.  If the QFPROM is writable then all 4 regions
33    # must be provided.
34    oneOf:
35      - items:
36          - description: The corrected region.
37      - items:
38          - description: The corrected region.
39          - description: The raw region.
40          - description: The config region.
41          - description: The security control region.
42
43  # Clock must be provided if QFPROM is writable from the OS image.
44  clocks:
45    maxItems: 1
46  clock-names:
47    const: core
48
49  # Supply reference must be provided if QFPROM is writable from the OS image.
50  vcc-supply:
51    description: Our power supply.
52
53  # Needed if any child nodes are present.
54  "#address-cells":
55    const: 1
56  "#size-cells":
57    const: 1
58
59required:
60  - compatible
61  - reg
62
63unevaluatedProperties: false
64
65examples:
66  - |
67    #include <dt-bindings/clock/qcom,gcc-sc7180.h>
68
69    soc {
70      #address-cells = <2>;
71      #size-cells = <2>;
72
73      efuse@784000 {
74        compatible = "qcom,sc7180-qfprom", "qcom,qfprom";
75        reg = <0 0x00784000 0 0x8ff>,
76              <0 0x00780000 0 0x7a0>,
77              <0 0x00782000 0 0x100>,
78              <0 0x00786000 0 0x1fff>;
79        clocks = <&gcc GCC_SEC_CTRL_CLK_SRC>;
80        clock-names = "core";
81        #address-cells = <1>;
82        #size-cells = <1>;
83
84        vcc-supply = <&vreg_l11a_1p8>;
85
86        hstx-trim-primary@25b {
87          reg = <0x25b 0x1>;
88          bits = <1 3>;
89        };
90      };
91    };
92
93  - |
94    soc {
95      #address-cells = <2>;
96      #size-cells = <2>;
97
98      efuse@784000 {
99        compatible = "qcom,sdm845-qfprom", "qcom,qfprom";
100        reg = <0 0x00784000 0 0x8ff>;
101        #address-cells = <1>;
102        #size-cells = <1>;
103
104        hstx-trim-primary@1eb {
105          reg = <0x1eb 0x1>;
106          bits = <1 4>;
107        };
108      };
109    };
110