1*b76eaf7dSYanhong Wang# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*b76eaf7dSYanhong Wang# Copyright (C) 2022 StarFive Technology Co., Ltd. 3*b76eaf7dSYanhong Wang%YAML 1.2 4*b76eaf7dSYanhong Wang--- 5*b76eaf7dSYanhong Wang$id: http://devicetree.org/schemas/net/starfive,jh7110-dwmac.yaml# 6*b76eaf7dSYanhong Wang$schema: http://devicetree.org/meta-schemas/core.yaml# 7*b76eaf7dSYanhong Wang 8*b76eaf7dSYanhong Wangtitle: StarFive JH7110 DWMAC glue layer 9*b76eaf7dSYanhong Wang 10*b76eaf7dSYanhong Wangmaintainers: 11*b76eaf7dSYanhong Wang - Emil Renner Berthing <kernel@esmil.dk> 12*b76eaf7dSYanhong Wang - Samin Guo <samin.guo@starfivetech.com> 13*b76eaf7dSYanhong Wang 14*b76eaf7dSYanhong Wangselect: 15*b76eaf7dSYanhong Wang properties: 16*b76eaf7dSYanhong Wang compatible: 17*b76eaf7dSYanhong Wang contains: 18*b76eaf7dSYanhong Wang enum: 19*b76eaf7dSYanhong Wang - starfive,jh7110-dwmac 20*b76eaf7dSYanhong Wang required: 21*b76eaf7dSYanhong Wang - compatible 22*b76eaf7dSYanhong Wang 23*b76eaf7dSYanhong Wangproperties: 24*b76eaf7dSYanhong Wang compatible: 25*b76eaf7dSYanhong Wang items: 26*b76eaf7dSYanhong Wang - enum: 27*b76eaf7dSYanhong Wang - starfive,jh7110-dwmac 28*b76eaf7dSYanhong Wang - const: snps,dwmac-5.20 29*b76eaf7dSYanhong Wang 30*b76eaf7dSYanhong Wang reg: 31*b76eaf7dSYanhong Wang maxItems: 1 32*b76eaf7dSYanhong Wang 33*b76eaf7dSYanhong Wang clocks: 34*b76eaf7dSYanhong Wang items: 35*b76eaf7dSYanhong Wang - description: GMAC main clock 36*b76eaf7dSYanhong Wang - description: GMAC AHB clock 37*b76eaf7dSYanhong Wang - description: PTP clock 38*b76eaf7dSYanhong Wang - description: TX clock 39*b76eaf7dSYanhong Wang - description: GTX clock 40*b76eaf7dSYanhong Wang 41*b76eaf7dSYanhong Wang clock-names: 42*b76eaf7dSYanhong Wang items: 43*b76eaf7dSYanhong Wang - const: stmmaceth 44*b76eaf7dSYanhong Wang - const: pclk 45*b76eaf7dSYanhong Wang - const: ptp_ref 46*b76eaf7dSYanhong Wang - const: tx 47*b76eaf7dSYanhong Wang - const: gtx 48*b76eaf7dSYanhong Wang 49*b76eaf7dSYanhong Wang interrupts: 50*b76eaf7dSYanhong Wang minItems: 3 51*b76eaf7dSYanhong Wang maxItems: 3 52*b76eaf7dSYanhong Wang 53*b76eaf7dSYanhong Wang interrupt-names: 54*b76eaf7dSYanhong Wang minItems: 3 55*b76eaf7dSYanhong Wang maxItems: 3 56*b76eaf7dSYanhong Wang 57*b76eaf7dSYanhong Wang resets: 58*b76eaf7dSYanhong Wang items: 59*b76eaf7dSYanhong Wang - description: MAC Reset signal. 60*b76eaf7dSYanhong Wang - description: AHB Reset signal. 61*b76eaf7dSYanhong Wang 62*b76eaf7dSYanhong Wang reset-names: 63*b76eaf7dSYanhong Wang items: 64*b76eaf7dSYanhong Wang - const: stmmaceth 65*b76eaf7dSYanhong Wang - const: ahb 66*b76eaf7dSYanhong Wang 67*b76eaf7dSYanhong Wang starfive,tx-use-rgmii-clk: 68*b76eaf7dSYanhong Wang description: 69*b76eaf7dSYanhong Wang Tx clock is provided by external rgmii clock. 70*b76eaf7dSYanhong Wang type: boolean 71*b76eaf7dSYanhong Wang 72*b76eaf7dSYanhong Wang starfive,syscon: 73*b76eaf7dSYanhong Wang $ref: /schemas/types.yaml#/definitions/phandle-array 74*b76eaf7dSYanhong Wang items: 75*b76eaf7dSYanhong Wang - items: 76*b76eaf7dSYanhong Wang - description: phandle to syscon that configures phy mode 77*b76eaf7dSYanhong Wang - description: Offset of phy mode selection 78*b76eaf7dSYanhong Wang - description: Shift of phy mode selection 79*b76eaf7dSYanhong Wang description: 80*b76eaf7dSYanhong Wang A phandle to syscon with two arguments that configure phy mode. 81*b76eaf7dSYanhong Wang The argument one is the offset of phy mode selection, the 82*b76eaf7dSYanhong Wang argument two is the shift of phy mode selection. 83*b76eaf7dSYanhong Wang 84*b76eaf7dSYanhong Wangrequired: 85*b76eaf7dSYanhong Wang - compatible 86*b76eaf7dSYanhong Wang - reg 87*b76eaf7dSYanhong Wang - clocks 88*b76eaf7dSYanhong Wang - clock-names 89*b76eaf7dSYanhong Wang - interrupts 90*b76eaf7dSYanhong Wang - interrupt-names 91*b76eaf7dSYanhong Wang - resets 92*b76eaf7dSYanhong Wang - reset-names 93*b76eaf7dSYanhong Wang 94*b76eaf7dSYanhong WangallOf: 95*b76eaf7dSYanhong Wang - $ref: snps,dwmac.yaml# 96*b76eaf7dSYanhong Wang 97*b76eaf7dSYanhong WangunevaluatedProperties: false 98*b76eaf7dSYanhong Wang 99*b76eaf7dSYanhong Wangexamples: 100*b76eaf7dSYanhong Wang - | 101*b76eaf7dSYanhong Wang ethernet@16030000 { 102*b76eaf7dSYanhong Wang compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20"; 103*b76eaf7dSYanhong Wang reg = <0x16030000 0x10000>; 104*b76eaf7dSYanhong Wang clocks = <&clk 3>, <&clk 2>, <&clk 109>, 105*b76eaf7dSYanhong Wang <&clk 6>, <&clk 111>; 106*b76eaf7dSYanhong Wang clock-names = "stmmaceth", "pclk", "ptp_ref", 107*b76eaf7dSYanhong Wang "tx", "gtx"; 108*b76eaf7dSYanhong Wang resets = <&rst 1>, <&rst 2>; 109*b76eaf7dSYanhong Wang reset-names = "stmmaceth", "ahb"; 110*b76eaf7dSYanhong Wang interrupts = <7>, <6>, <5>; 111*b76eaf7dSYanhong Wang interrupt-names = "macirq", "eth_wake_irq", "eth_lpi"; 112*b76eaf7dSYanhong Wang phy-mode = "rgmii-id"; 113*b76eaf7dSYanhong Wang snps,multicast-filter-bins = <64>; 114*b76eaf7dSYanhong Wang snps,perfect-filter-entries = <8>; 115*b76eaf7dSYanhong Wang rx-fifo-depth = <2048>; 116*b76eaf7dSYanhong Wang tx-fifo-depth = <2048>; 117*b76eaf7dSYanhong Wang snps,fixed-burst; 118*b76eaf7dSYanhong Wang snps,no-pbl-x8; 119*b76eaf7dSYanhong Wang snps,tso; 120*b76eaf7dSYanhong Wang snps,force_thresh_dma_mode; 121*b76eaf7dSYanhong Wang snps,axi-config = <&stmmac_axi_setup>; 122*b76eaf7dSYanhong Wang snps,en-tx-lpi-clockgating; 123*b76eaf7dSYanhong Wang snps,txpbl = <16>; 124*b76eaf7dSYanhong Wang snps,rxpbl = <16>; 125*b76eaf7dSYanhong Wang starfive,syscon = <&aon_syscon 0xc 0x12>; 126*b76eaf7dSYanhong Wang phy-handle = <&phy0>; 127*b76eaf7dSYanhong Wang 128*b76eaf7dSYanhong Wang mdio { 129*b76eaf7dSYanhong Wang #address-cells = <1>; 130*b76eaf7dSYanhong Wang #size-cells = <0>; 131*b76eaf7dSYanhong Wang compatible = "snps,dwmac-mdio"; 132*b76eaf7dSYanhong Wang 133*b76eaf7dSYanhong Wang phy0: ethernet-phy@0 { 134*b76eaf7dSYanhong Wang reg = <0>; 135*b76eaf7dSYanhong Wang }; 136*b76eaf7dSYanhong Wang }; 137*b76eaf7dSYanhong Wang 138*b76eaf7dSYanhong Wang stmmac_axi_setup: stmmac-axi-config { 139*b76eaf7dSYanhong Wang snps,lpi_en; 140*b76eaf7dSYanhong Wang snps,wr_osr_lmt = <4>; 141*b76eaf7dSYanhong Wang snps,rd_osr_lmt = <4>; 142*b76eaf7dSYanhong Wang snps,blen = <256 128 64 32 0 0 0>; 143*b76eaf7dSYanhong Wang }; 144*b76eaf7dSYanhong Wang }; 145