1*15eb1621SRob Herring# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*15eb1621SRob Herring%YAML 1.2
3*15eb1621SRob Herring---
4*15eb1621SRob Herring$id: http://devicetree.org/schemas/net/socionext,synquacer-netsec.yaml#
5*15eb1621SRob Herring$schema: http://devicetree.org/meta-schemas/core.yaml#
6*15eb1621SRob Herring
7*15eb1621SRob Herringtitle: Socionext NetSec Ethernet Controller IP
8*15eb1621SRob Herring
9*15eb1621SRob Herringmaintainers:
10*15eb1621SRob Herring  - Jassi Brar <jaswinder.singh@linaro.org>
11*15eb1621SRob Herring  - Ilias Apalodimas <ilias.apalodimas@linaro.org>
12*15eb1621SRob Herring
13*15eb1621SRob HerringallOf:
14*15eb1621SRob Herring  - $ref: ethernet-controller.yaml#
15*15eb1621SRob Herring
16*15eb1621SRob Herringproperties:
17*15eb1621SRob Herring  compatible:
18*15eb1621SRob Herring    const: socionext,synquacer-netsec
19*15eb1621SRob Herring
20*15eb1621SRob Herring  reg:
21*15eb1621SRob Herring    items:
22*15eb1621SRob Herring      - description: control register area
23*15eb1621SRob Herring      - description: EEPROM holding the MAC address and microengine firmware
24*15eb1621SRob Herring
25*15eb1621SRob Herring  clocks:
26*15eb1621SRob Herring    maxItems: 1
27*15eb1621SRob Herring
28*15eb1621SRob Herring  clock-names:
29*15eb1621SRob Herring    const: phy_ref_clk
30*15eb1621SRob Herring
31*15eb1621SRob Herring  dma-coherent: true
32*15eb1621SRob Herring
33*15eb1621SRob Herring  interrupts:
34*15eb1621SRob Herring    maxItems: 1
35*15eb1621SRob Herring
36*15eb1621SRob Herring  mdio:
37*15eb1621SRob Herring    $ref: mdio.yaml#
38*15eb1621SRob Herring
39*15eb1621SRob Herringrequired:
40*15eb1621SRob Herring  - compatible
41*15eb1621SRob Herring  - reg
42*15eb1621SRob Herring  - clocks
43*15eb1621SRob Herring  - clock-names
44*15eb1621SRob Herring  - interrupts
45*15eb1621SRob Herring  - mdio
46*15eb1621SRob Herring
47*15eb1621SRob HerringunevaluatedProperties: false
48*15eb1621SRob Herring
49*15eb1621SRob Herringexamples:
50*15eb1621SRob Herring  - |
51*15eb1621SRob Herring    #include <dt-bindings/interrupt-controller/arm-gic.h>
52*15eb1621SRob Herring
53*15eb1621SRob Herring    ethernet@522d0000 {
54*15eb1621SRob Herring        compatible = "socionext,synquacer-netsec";
55*15eb1621SRob Herring        reg = <0x522d0000 0x10000>, <0x10000000 0x10000>;
56*15eb1621SRob Herring        interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
57*15eb1621SRob Herring        clocks = <&clk_netsec>;
58*15eb1621SRob Herring        clock-names = "phy_ref_clk";
59*15eb1621SRob Herring        phy-mode = "rgmii";
60*15eb1621SRob Herring        max-speed = <1000>;
61*15eb1621SRob Herring        max-frame-size = <9000>;
62*15eb1621SRob Herring        phy-handle = <&phy1>;
63*15eb1621SRob Herring
64*15eb1621SRob Herring        mdio {
65*15eb1621SRob Herring            #address-cells = <1>;
66*15eb1621SRob Herring            #size-cells = <0>;
67*15eb1621SRob Herring            phy1: ethernet-phy@1 {
68*15eb1621SRob Herring                compatible = "ethernet-phy-ieee802.3-c22";
69*15eb1621SRob Herring                reg = <1>;
70*15eb1621SRob Herring            };
71*15eb1621SRob Herring        };
72*15eb1621SRob Herring    };
73*15eb1621SRob Herring...
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