1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/net/snps,dwmac.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Synopsys DesignWare MAC Device Tree Bindings 8 9maintainers: 10 - Alexandre Torgue <alexandre.torgue@st.com> 11 - Giuseppe Cavallaro <peppe.cavallaro@st.com> 12 - Jose Abreu <joabreu@synopsys.com> 13 14# Select every compatible, including the deprecated ones. This way, we 15# will be able to report a warning when we have that compatible, since 16# we will validate the node thanks to the select, but won't report it 17# as a valid value in the compatible property description 18select: 19 properties: 20 compatible: 21 contains: 22 enum: 23 - snps,dwmac 24 - snps,dwmac-3.50a 25 - snps,dwmac-3.610 26 - snps,dwmac-3.70a 27 - snps,dwmac-3.710 28 - snps,dwmac-4.00 29 - snps,dwmac-4.10a 30 - snps,dwxgmac 31 - snps,dwxgmac-2.10 32 33 # Deprecated 34 - st,spear600-gmac 35 36 required: 37 - compatible 38 39properties: 40 41 # We need to include all the compatibles from schemas that will 42 # include that schemas, otherwise compatible won't validate for 43 # those. 44 compatible: 45 contains: 46 enum: 47 - allwinner,sun7i-a20-gmac 48 - allwinner,sun8i-a83t-emac 49 - allwinner,sun8i-h3-emac 50 - allwinner,sun8i-r40-emac 51 - allwinner,sun8i-v3s-emac 52 - allwinner,sun50i-a64-emac 53 - amlogic,meson6-dwmac 54 - amlogic,meson8b-dwmac 55 - amlogic,meson8m2-dwmac 56 - amlogic,meson-gxbb-dwmac 57 - amlogic,meson-axg-dwmac 58 - snps,dwmac 59 - snps,dwmac-3.50a 60 - snps,dwmac-3.610 61 - snps,dwmac-3.70a 62 - snps,dwmac-3.710 63 - snps,dwmac-4.00 64 - snps,dwmac-4.10a 65 - snps,dwxgmac 66 - snps,dwxgmac-2.10 67 68 reg: 69 minItems: 1 70 maxItems: 2 71 72 interrupts: 73 minItems: 1 74 maxItems: 3 75 items: 76 - description: Combined signal for various interrupt events 77 - description: The interrupt to manage the remote wake-up packet detection 78 - description: The interrupt that occurs when Rx exits the LPI state 79 80 interrupt-names: 81 minItems: 1 82 maxItems: 3 83 items: 84 - const: macirq 85 - const: eth_wake_irq 86 - const: eth_lpi 87 88 clocks: 89 minItems: 1 90 maxItems: 3 91 items: 92 - description: GMAC main clock 93 - description: Peripheral registers interface clock 94 - description: 95 PTP reference clock. This clock is used for programming the 96 Timestamp Addend Register. If not passed then the system 97 clock will be used and this is fine on some platforms. 98 99 clock-names: 100 additionalItems: true 101 contains: 102 enum: 103 - stmmaceth 104 - pclk 105 - ptp_ref 106 107 resets: 108 maxItems: 1 109 description: 110 MAC Reset signal. 111 112 reset-names: 113 const: stmmaceth 114 115 mac-mode: 116 $ref: ethernet-controller.yaml#/properties/phy-connection-type 117 description: 118 The property is identical to 'phy-mode', and assumes that there is mode 119 converter in-between the MAC & PHY (e.g. GMII-to-RGMII). This converter 120 can be passive (no SW requirement), and requires that the MAC operate 121 in a different mode than the PHY in order to function. 122 123 snps,axi-config: 124 $ref: /schemas/types.yaml#definitions/phandle 125 description: 126 AXI BUS Mode parameters. Phandle to a node that can contain the 127 following properties 128 * snps,lpi_en, enable Low Power Interface 129 * snps,xit_frm, unlock on WoL 130 * snps,wr_osr_lmt, max write outstanding req. limit 131 * snps,rd_osr_lmt, max read outstanding req. limit 132 * snps,kbbe, do not cross 1KiB boundary. 133 * snps,blen, this is a vector of supported burst length. 134 * snps,fb, fixed-burst 135 * snps,mb, mixed-burst 136 * snps,rb, rebuild INCRx Burst 137 138 snps,mtl-rx-config: 139 $ref: /schemas/types.yaml#definitions/phandle 140 description: 141 Multiple RX Queues parameters. Phandle to a node that can 142 contain the following properties 143 * snps,rx-queues-to-use, number of RX queues to be used in the 144 driver 145 * Choose one of these RX scheduling algorithms 146 * snps,rx-sched-sp, Strict priority 147 * snps,rx-sched-wsp, Weighted Strict priority 148 * For each RX queue 149 * Choose one of these modes 150 * snps,dcb-algorithm, Queue to be enabled as DCB 151 * snps,avb-algorithm, Queue to be enabled as AVB 152 * snps,map-to-dma-channel, Channel to map 153 * Specifiy specific packet routing 154 * snps,route-avcp, AV Untagged Control packets 155 * snps,route-ptp, PTP Packets 156 * snps,route-dcbcp, DCB Control Packets 157 * snps,route-up, Untagged Packets 158 * snps,route-multi-broad, Multicast & Broadcast Packets 159 * snps,priority, RX queue priority (Range 0x0 to 0xF) 160 161 snps,mtl-tx-config: 162 $ref: /schemas/types.yaml#definitions/phandle 163 description: 164 Multiple TX Queues parameters. Phandle to a node that can 165 contain the following properties 166 * snps,tx-queues-to-use, number of TX queues to be used in the 167 driver 168 * Choose one of these TX scheduling algorithms 169 * snps,tx-sched-wrr, Weighted Round Robin 170 * snps,tx-sched-wfq, Weighted Fair Queuing 171 * snps,tx-sched-dwrr, Deficit Weighted Round Robin 172 * snps,tx-sched-sp, Strict priority 173 * For each TX queue 174 * snps,weight, TX queue weight (if using a DCB weight 175 algorithm) 176 * Choose one of these modes 177 * snps,dcb-algorithm, TX queue will be working in DCB 178 * snps,avb-algorithm, TX queue will be working in AVB 179 [Attention] Queue 0 is reserved for legacy traffic 180 and so no AVB is available in this queue. 181 * Configure Credit Base Shaper (if AVB Mode selected) 182 * snps,send_slope, enable Low Power Interface 183 * snps,idle_slope, unlock on WoL 184 * snps,high_credit, max write outstanding req. limit 185 * snps,low_credit, max read outstanding req. limit 186 * snps,priority, TX queue priority (Range 0x0 to 0xF) 187 188 snps,reset-gpio: 189 deprecated: true 190 maxItems: 1 191 description: 192 PHY Reset GPIO 193 194 snps,reset-active-low: 195 deprecated: true 196 $ref: /schemas/types.yaml#definitions/flag 197 description: 198 Indicates that the PHY Reset is active low 199 200 snps,reset-delays-us: 201 deprecated: true 202 allOf: 203 - $ref: /schemas/types.yaml#definitions/uint32-array 204 - minItems: 3 205 maxItems: 3 206 description: 207 Triplet of delays. The 1st cell is reset pre-delay in micro 208 seconds. The 2nd cell is reset pulse in micro seconds. The 3rd 209 cell is reset post-delay in micro seconds. 210 211 snps,aal: 212 $ref: /schemas/types.yaml#definitions/flag 213 description: 214 Use Address-Aligned Beats 215 216 snps,fixed-burst: 217 $ref: /schemas/types.yaml#definitions/flag 218 description: 219 Program the DMA to use the fixed burst mode 220 221 snps,mixed-burst: 222 $ref: /schemas/types.yaml#definitions/flag 223 description: 224 Program the DMA to use the mixed burst mode 225 226 snps,force_thresh_dma_mode: 227 $ref: /schemas/types.yaml#definitions/flag 228 description: 229 Force DMA to use the threshold mode for both tx and rx 230 231 snps,force_sf_dma_mode: 232 $ref: /schemas/types.yaml#definitions/flag 233 description: 234 Force DMA to use the Store and Forward mode for both tx and 235 rx. This flag is ignored if force_thresh_dma_mode is set. 236 237 snps,en-tx-lpi-clockgating: 238 $ref: /schemas/types.yaml#definitions/flag 239 description: 240 Enable gating of the MAC TX clock during TX low-power mode 241 242 snps,multicast-filter-bins: 243 $ref: /schemas/types.yaml#definitions/uint32 244 description: 245 Number of multicast filter hash bins supported by this device 246 instance 247 248 snps,perfect-filter-entries: 249 $ref: /schemas/types.yaml#definitions/uint32 250 description: 251 Number of perfect filter entries supported by this device 252 instance 253 254 snps,ps-speed: 255 $ref: /schemas/types.yaml#definitions/uint32 256 description: 257 Port selection speed that can be passed to the core when PCS 258 is supported. For example, this is used in case of SGMII and 259 MAC2MAC connection. 260 261 mdio: 262 type: object 263 description: 264 Creates and registers an MDIO bus. 265 266 properties: 267 compatible: 268 const: snps,dwmac-mdio 269 270 required: 271 - compatible 272 273required: 274 - compatible 275 - reg 276 - interrupts 277 - interrupt-names 278 - phy-mode 279 280dependencies: 281 snps,reset-active-low: ["snps,reset-gpio"] 282 snps,reset-delay-us: ["snps,reset-gpio"] 283 284allOf: 285 - $ref: "ethernet-controller.yaml#" 286 - if: 287 properties: 288 compatible: 289 contains: 290 enum: 291 - allwinner,sun7i-a20-gmac 292 - allwinner,sun8i-a83t-emac 293 - allwinner,sun8i-h3-emac 294 - allwinner,sun8i-r40-emac 295 - allwinner,sun8i-v3s-emac 296 - allwinner,sun50i-a64-emac 297 - snps,dwxgmac 298 - snps,dwxgmac-2.10 299 - st,spear600-gmac 300 301 then: 302 properties: 303 snps,pbl: 304 allOf: 305 - $ref: /schemas/types.yaml#definitions/uint32 306 - enum: [2, 4, 8] 307 description: 308 Programmable Burst Length (tx and rx) 309 310 snps,txpbl: 311 allOf: 312 - $ref: /schemas/types.yaml#definitions/uint32 313 - enum: [2, 4, 8] 314 description: 315 Tx Programmable Burst Length. If set, DMA tx will use this 316 value rather than snps,pbl. 317 318 snps,rxpbl: 319 allOf: 320 - $ref: /schemas/types.yaml#definitions/uint32 321 - enum: [2, 4, 8] 322 description: 323 Rx Programmable Burst Length. If set, DMA rx will use this 324 value rather than snps,pbl. 325 326 snps,no-pbl-x8: 327 $ref: /schemas/types.yaml#definitions/flag 328 description: 329 Don\'t multiply the pbl/txpbl/rxpbl values by 8. For core 330 rev < 3.50, don\'t multiply the values by 4. 331 332 - if: 333 properties: 334 compatible: 335 contains: 336 enum: 337 - allwinner,sun7i-a20-gmac 338 - allwinner,sun8i-a83t-emac 339 - allwinner,sun8i-h3-emac 340 - allwinner,sun8i-r40-emac 341 - allwinner,sun8i-v3s-emac 342 - allwinner,sun50i-a64-emac 343 - snps,dwmac-4.00 344 - snps,dwmac-4.10a 345 - snps,dwxgmac 346 - snps,dwxgmac-2.10 347 - st,spear600-gmac 348 349 then: 350 snps,tso: 351 $ref: /schemas/types.yaml#definitions/flag 352 description: 353 Enables the TSO feature otherwise it will be managed by 354 MAC HW capability register. 355 356examples: 357 - | 358 stmmac_axi_setup: stmmac-axi-config { 359 snps,wr_osr_lmt = <0xf>; 360 snps,rd_osr_lmt = <0xf>; 361 snps,blen = <256 128 64 32 0 0 0>; 362 }; 363 364 mtl_rx_setup: rx-queues-config { 365 snps,rx-queues-to-use = <1>; 366 snps,rx-sched-sp; 367 queue0 { 368 snps,dcb-algorithm; 369 snps,map-to-dma-channel = <0x0>; 370 snps,priority = <0x0>; 371 }; 372 }; 373 374 mtl_tx_setup: tx-queues-config { 375 snps,tx-queues-to-use = <2>; 376 snps,tx-sched-wrr; 377 queue0 { 378 snps,weight = <0x10>; 379 snps,dcb-algorithm; 380 snps,priority = <0x0>; 381 }; 382 383 queue1 { 384 snps,avb-algorithm; 385 snps,send_slope = <0x1000>; 386 snps,idle_slope = <0x1000>; 387 snps,high_credit = <0x3E800>; 388 snps,low_credit = <0xFFC18000>; 389 snps,priority = <0x1>; 390 }; 391 }; 392 393 gmac0: ethernet@e0800000 { 394 compatible = "snps,dwxgmac-2.10", "snps,dwxgmac"; 395 reg = <0xe0800000 0x8000>; 396 interrupt-parent = <&vic1>; 397 interrupts = <24 23 22>; 398 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi"; 399 mac-address = [000000000000]; /* Filled in by U-Boot */ 400 max-frame-size = <3800>; 401 phy-mode = "gmii"; 402 snps,multicast-filter-bins = <256>; 403 snps,perfect-filter-entries = <128>; 404 rx-fifo-depth = <16384>; 405 tx-fifo-depth = <16384>; 406 clocks = <&clock>; 407 clock-names = "stmmaceth"; 408 snps,axi-config = <&stmmac_axi_setup>; 409 snps,mtl-rx-config = <&mtl_rx_setup>; 410 snps,mtl-tx-config = <&mtl_tx_setup>; 411 mdio0 { 412 #address-cells = <1>; 413 #size-cells = <0>; 414 compatible = "snps,dwmac-mdio"; 415 phy1: ethernet-phy@0 { 416 reg = <0>; 417 }; 418 }; 419 }; 420 421# FIXME: We should set it, but it would report all the generic 422# properties as additional properties. 423# additionalProperties: false 424 425... 426