1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/snps,dwmac.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Synopsys DesignWare MAC Device Tree Bindings
8
9maintainers:
10  - Alexandre Torgue <alexandre.torgue@foss.st.com>
11  - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12  - Jose Abreu <joabreu@synopsys.com>
13
14# Select every compatible, including the deprecated ones. This way, we
15# will be able to report a warning when we have that compatible, since
16# we will validate the node thanks to the select, but won't report it
17# as a valid value in the compatible property description
18select:
19  properties:
20    compatible:
21      contains:
22        enum:
23          - snps,dwmac
24          - snps,dwmac-3.40a
25          - snps,dwmac-3.50a
26          - snps,dwmac-3.610
27          - snps,dwmac-3.70a
28          - snps,dwmac-3.710
29          - snps,dwmac-4.00
30          - snps,dwmac-4.10a
31          - snps,dwmac-4.20a
32          - snps,dwmac-5.10a
33          - snps,dwxgmac
34          - snps,dwxgmac-2.10
35
36          # Deprecated
37          - st,spear600-gmac
38
39  required:
40    - compatible
41
42properties:
43
44  # We need to include all the compatibles from schemas that will
45  # include that schemas, otherwise compatible won't validate for
46  # those.
47  compatible:
48    contains:
49      enum:
50        - allwinner,sun7i-a20-gmac
51        - allwinner,sun8i-a83t-emac
52        - allwinner,sun8i-h3-emac
53        - allwinner,sun8i-r40-gmac
54        - allwinner,sun8i-v3s-emac
55        - allwinner,sun50i-a64-emac
56        - amlogic,meson6-dwmac
57        - amlogic,meson8b-dwmac
58        - amlogic,meson8m2-dwmac
59        - amlogic,meson-gxbb-dwmac
60        - amlogic,meson-axg-dwmac
61        - ingenic,jz4775-mac
62        - ingenic,x1000-mac
63        - ingenic,x1600-mac
64        - ingenic,x1830-mac
65        - ingenic,x2000-mac
66        - loongson,ls2k-dwmac
67        - loongson,ls7a-dwmac
68        - rockchip,px30-gmac
69        - rockchip,rk3128-gmac
70        - rockchip,rk3228-gmac
71        - rockchip,rk3288-gmac
72        - rockchip,rk3328-gmac
73        - rockchip,rk3366-gmac
74        - rockchip,rk3368-gmac
75        - rockchip,rk3399-gmac
76        - rockchip,rv1108-gmac
77        - snps,dwmac
78        - snps,dwmac-3.40a
79        - snps,dwmac-3.50a
80        - snps,dwmac-3.610
81        - snps,dwmac-3.70a
82        - snps,dwmac-3.710
83        - snps,dwmac-4.00
84        - snps,dwmac-4.10a
85        - snps,dwmac-4.20a
86        - snps,dwmac-5.10a
87        - snps,dwxgmac
88        - snps,dwxgmac-2.10
89
90  reg:
91    minItems: 1
92    maxItems: 2
93
94  interrupts:
95    minItems: 1
96    items:
97      - description: Combined signal for various interrupt events
98      - description: The interrupt to manage the remote wake-up packet detection
99      - description: The interrupt that occurs when Rx exits the LPI state
100
101  interrupt-names:
102    minItems: 1
103    items:
104      - const: macirq
105      - const: eth_wake_irq
106      - const: eth_lpi
107
108  clocks:
109    minItems: 1
110    maxItems: 8
111    additionalItems: true
112    items:
113      - description: GMAC main clock
114      - description: Peripheral registers interface clock
115      - description:
116          PTP reference clock. This clock is used for programming the
117          Timestamp Addend Register. If not passed then the system
118          clock will be used and this is fine on some platforms.
119
120  clock-names:
121    minItems: 1
122    maxItems: 8
123    additionalItems: true
124    contains:
125      enum:
126        - stmmaceth
127        - pclk
128        - ptp_ref
129
130  resets:
131    maxItems: 1
132    description:
133      MAC Reset signal.
134
135  reset-names:
136    const: stmmaceth
137
138  mac-mode:
139    $ref: ethernet-controller.yaml#/properties/phy-connection-type
140    description:
141      The property is identical to 'phy-mode', and assumes that there is mode
142      converter in-between the MAC & PHY (e.g. GMII-to-RGMII). This converter
143      can be passive (no SW requirement), and requires that the MAC operate
144      in a different mode than the PHY in order to function.
145
146  snps,axi-config:
147    $ref: /schemas/types.yaml#/definitions/phandle
148    description:
149      AXI BUS Mode parameters. Phandle to a node that can contain the
150      following properties
151        * snps,lpi_en, enable Low Power Interface
152        * snps,xit_frm, unlock on WoL
153        * snps,wr_osr_lmt, max write outstanding req. limit
154        * snps,rd_osr_lmt, max read outstanding req. limit
155        * snps,kbbe, do not cross 1KiB boundary.
156        * snps,blen, this is a vector of supported burst length.
157        * snps,fb, fixed-burst
158        * snps,mb, mixed-burst
159        * snps,rb, rebuild INCRx Burst
160
161  snps,mtl-rx-config:
162    $ref: /schemas/types.yaml#/definitions/phandle
163    description:
164      Multiple RX Queues parameters. Phandle to a node that can
165      contain the following properties
166        * snps,rx-queues-to-use, number of RX queues to be used in the
167          driver
168        * Choose one of these RX scheduling algorithms
169          * snps,rx-sched-sp, Strict priority
170          * snps,rx-sched-wsp, Weighted Strict priority
171        * For each RX queue
172          * Choose one of these modes
173            * snps,dcb-algorithm, Queue to be enabled as DCB
174            * snps,avb-algorithm, Queue to be enabled as AVB
175          * snps,map-to-dma-channel, Channel to map
176          * Specifiy specific packet routing
177            * snps,route-avcp, AV Untagged Control packets
178            * snps,route-ptp, PTP Packets
179            * snps,route-dcbcp, DCB Control Packets
180            * snps,route-up, Untagged Packets
181            * snps,route-multi-broad, Multicast & Broadcast Packets
182          * snps,priority, bitmask of the tagged frames priorities assigned to
183            the queue
184
185  snps,mtl-tx-config:
186    $ref: /schemas/types.yaml#/definitions/phandle
187    description:
188      Multiple TX Queues parameters. Phandle to a node that can
189      contain the following properties
190        * snps,tx-queues-to-use, number of TX queues to be used in the
191          driver
192        * Choose one of these TX scheduling algorithms
193          * snps,tx-sched-wrr, Weighted Round Robin
194          * snps,tx-sched-wfq, Weighted Fair Queuing
195          * snps,tx-sched-dwrr, Deficit Weighted Round Robin
196          * snps,tx-sched-sp, Strict priority
197        * For each TX queue
198          * snps,weight, TX queue weight (if using a DCB weight
199            algorithm)
200          * Choose one of these modes
201            * snps,dcb-algorithm, TX queue will be working in DCB
202            * snps,avb-algorithm, TX queue will be working in AVB
203              [Attention] Queue 0 is reserved for legacy traffic
204                          and so no AVB is available in this queue.
205          * Configure Credit Base Shaper (if AVB Mode selected)
206            * snps,send_slope, enable Low Power Interface
207            * snps,idle_slope, unlock on WoL
208            * snps,high_credit, max write outstanding req. limit
209            * snps,low_credit, max read outstanding req. limit
210          * snps,priority, bitmask of the priorities assigned to the queue.
211            When a PFC frame is received with priorities matching the bitmask,
212            the queue is blocked from transmitting for the pause time specified
213            in the PFC frame.
214
215  snps,reset-gpio:
216    deprecated: true
217    maxItems: 1
218    description:
219      PHY Reset GPIO
220
221  snps,reset-active-low:
222    deprecated: true
223    $ref: /schemas/types.yaml#/definitions/flag
224    description:
225      Indicates that the PHY Reset is active low
226
227  snps,reset-delays-us:
228    deprecated: true
229    description:
230      Triplet of delays. The 1st cell is reset pre-delay in micro
231      seconds. The 2nd cell is reset pulse in micro seconds. The 3rd
232      cell is reset post-delay in micro seconds.
233    minItems: 3
234    maxItems: 3
235
236  snps,aal:
237    $ref: /schemas/types.yaml#/definitions/flag
238    description:
239      Use Address-Aligned Beats
240
241  snps,fixed-burst:
242    $ref: /schemas/types.yaml#/definitions/flag
243    description:
244      Program the DMA to use the fixed burst mode
245
246  snps,mixed-burst:
247    $ref: /schemas/types.yaml#/definitions/flag
248    description:
249      Program the DMA to use the mixed burst mode
250
251  snps,force_thresh_dma_mode:
252    $ref: /schemas/types.yaml#/definitions/flag
253    description:
254      Force DMA to use the threshold mode for both tx and rx
255
256  snps,force_sf_dma_mode:
257    $ref: /schemas/types.yaml#/definitions/flag
258    description:
259      Force DMA to use the Store and Forward mode for both tx and
260      rx. This flag is ignored if force_thresh_dma_mode is set.
261
262  snps,en-tx-lpi-clockgating:
263    $ref: /schemas/types.yaml#/definitions/flag
264    description:
265      Enable gating of the MAC TX clock during TX low-power mode
266
267  snps,multicast-filter-bins:
268    $ref: /schemas/types.yaml#/definitions/uint32
269    description:
270      Number of multicast filter hash bins supported by this device
271      instance
272
273  snps,perfect-filter-entries:
274    $ref: /schemas/types.yaml#/definitions/uint32
275    description:
276      Number of perfect filter entries supported by this device
277      instance
278
279  snps,ps-speed:
280    $ref: /schemas/types.yaml#/definitions/uint32
281    description:
282      Port selection speed that can be passed to the core when PCS
283      is supported. For example, this is used in case of SGMII and
284      MAC2MAC connection.
285
286  mdio:
287    $ref: mdio.yaml#
288    unevaluatedProperties: false
289    description:
290      Creates and registers an MDIO bus.
291
292    properties:
293      compatible:
294        const: snps,dwmac-mdio
295
296    required:
297      - compatible
298
299required:
300  - compatible
301  - reg
302  - interrupts
303  - interrupt-names
304  - phy-mode
305
306dependencies:
307  snps,reset-active-low: ["snps,reset-gpio"]
308  snps,reset-delay-us: ["snps,reset-gpio"]
309
310allOf:
311  - $ref: "ethernet-controller.yaml#"
312  - if:
313      properties:
314        compatible:
315          contains:
316            enum:
317              - allwinner,sun7i-a20-gmac
318              - allwinner,sun8i-a83t-emac
319              - allwinner,sun8i-h3-emac
320              - allwinner,sun8i-r40-gmac
321              - allwinner,sun8i-v3s-emac
322              - allwinner,sun50i-a64-emac
323              - ingenic,jz4775-mac
324              - ingenic,x1000-mac
325              - ingenic,x1600-mac
326              - ingenic,x1830-mac
327              - ingenic,x2000-mac
328              - snps,dwmac-3.50a
329              - snps,dwmac-4.10a
330              - snps,dwmac-4.20a
331              - snps,dwxgmac
332              - snps,dwxgmac-2.10
333              - st,spear600-gmac
334
335    then:
336      properties:
337        snps,pbl:
338          description:
339            Programmable Burst Length (tx and rx)
340          $ref: /schemas/types.yaml#/definitions/uint32
341          enum: [1, 2, 4, 8, 16, 32]
342
343        snps,txpbl:
344          description:
345            Tx Programmable Burst Length. If set, DMA tx will use this
346            value rather than snps,pbl.
347          $ref: /schemas/types.yaml#/definitions/uint32
348          enum: [1, 2, 4, 8, 16, 32]
349
350        snps,rxpbl:
351          description:
352            Rx Programmable Burst Length. If set, DMA rx will use this
353            value rather than snps,pbl.
354          $ref: /schemas/types.yaml#/definitions/uint32
355          enum: [1, 2, 4, 8, 16, 32]
356
357        snps,no-pbl-x8:
358          $ref: /schemas/types.yaml#/definitions/flag
359          description:
360            Don\'t multiply the pbl/txpbl/rxpbl values by 8. For core
361            rev < 3.50, don\'t multiply the values by 4.
362
363  - if:
364      properties:
365        compatible:
366          contains:
367            enum:
368              - allwinner,sun7i-a20-gmac
369              - allwinner,sun8i-a83t-emac
370              - allwinner,sun8i-h3-emac
371              - allwinner,sun8i-r40-gmac
372              - allwinner,sun8i-v3s-emac
373              - allwinner,sun50i-a64-emac
374              - loongson,ls2k-dwmac
375              - loongson,ls7a-dwmac
376              - ingenic,jz4775-mac
377              - ingenic,x1000-mac
378              - ingenic,x1600-mac
379              - ingenic,x1830-mac
380              - ingenic,x2000-mac
381              - snps,dwmac-4.00
382              - snps,dwmac-4.10a
383              - snps,dwmac-4.20a
384              - snps,dwmac-5.10a
385              - snps,dwxgmac
386              - snps,dwxgmac-2.10
387              - st,spear600-gmac
388
389    then:
390      properties:
391        snps,tso:
392          $ref: /schemas/types.yaml#/definitions/flag
393          description:
394            Enables the TSO feature otherwise it will be managed by
395            MAC HW capability register.
396
397additionalProperties: true
398
399examples:
400  - |
401    stmmac_axi_setup: stmmac-axi-config {
402        snps,wr_osr_lmt = <0xf>;
403        snps,rd_osr_lmt = <0xf>;
404        snps,blen = <256 128 64 32 0 0 0>;
405    };
406
407    mtl_rx_setup: rx-queues-config {
408        snps,rx-queues-to-use = <1>;
409        snps,rx-sched-sp;
410        queue0 {
411            snps,dcb-algorithm;
412            snps,map-to-dma-channel = <0x0>;
413            snps,priority = <0x0>;
414        };
415    };
416
417    mtl_tx_setup: tx-queues-config {
418        snps,tx-queues-to-use = <2>;
419        snps,tx-sched-wrr;
420        queue0 {
421            snps,weight = <0x10>;
422            snps,dcb-algorithm;
423            snps,priority = <0x0>;
424        };
425
426        queue1 {
427            snps,avb-algorithm;
428            snps,send_slope = <0x1000>;
429            snps,idle_slope = <0x1000>;
430            snps,high_credit = <0x3E800>;
431            snps,low_credit = <0xFFC18000>;
432            snps,priority = <0x1>;
433        };
434    };
435
436    gmac0: ethernet@e0800000 {
437        compatible = "snps,dwxgmac-2.10", "snps,dwxgmac";
438        reg = <0xe0800000 0x8000>;
439        interrupt-parent = <&vic1>;
440        interrupts = <24 23 22>;
441        interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
442        mac-address = [000000000000]; /* Filled in by U-Boot */
443        max-frame-size = <3800>;
444        phy-mode = "gmii";
445        snps,multicast-filter-bins = <256>;
446        snps,perfect-filter-entries = <128>;
447        rx-fifo-depth = <16384>;
448        tx-fifo-depth = <16384>;
449        clocks = <&clock>;
450        clock-names = "stmmaceth";
451        snps,axi-config = <&stmmac_axi_setup>;
452        snps,mtl-rx-config = <&mtl_rx_setup>;
453        snps,mtl-tx-config = <&mtl_tx_setup>;
454        mdio0 {
455            #address-cells = <1>;
456            #size-cells = <0>;
457            compatible = "snps,dwmac-mdio";
458            phy1: ethernet-phy@0 {
459                reg = <0>;
460            };
461        };
462    };
463
464# FIXME: We should set it, but it would report all the generic
465# properties as additional properties.
466# additionalProperties: false
467
468...
469