1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/net/snps,dwmac.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Synopsys DesignWare MAC Device Tree Bindings 8 9maintainers: 10 - Alexandre Torgue <alexandre.torgue@st.com> 11 - Giuseppe Cavallaro <peppe.cavallaro@st.com> 12 - Jose Abreu <joabreu@synopsys.com> 13 14# Select every compatible, including the deprecated ones. This way, we 15# will be able to report a warning when we have that compatible, since 16# we will validate the node thanks to the select, but won't report it 17# as a valid value in the compatible property description 18select: 19 properties: 20 compatible: 21 contains: 22 enum: 23 - snps,dwmac 24 - snps,dwmac-3.50a 25 - snps,dwmac-3.610 26 - snps,dwmac-3.70a 27 - snps,dwmac-3.710 28 - snps,dwmac-4.00 29 - snps,dwmac-4.10a 30 - snps,dwmac-4.20a 31 - snps,dwxgmac 32 - snps,dwxgmac-2.10 33 34 # Deprecated 35 - st,spear600-gmac 36 37 required: 38 - compatible 39 40properties: 41 42 # We need to include all the compatibles from schemas that will 43 # include that schemas, otherwise compatible won't validate for 44 # those. 45 compatible: 46 contains: 47 enum: 48 - allwinner,sun7i-a20-gmac 49 - allwinner,sun8i-a83t-emac 50 - allwinner,sun8i-h3-emac 51 - allwinner,sun8i-r40-emac 52 - allwinner,sun8i-v3s-emac 53 - allwinner,sun50i-a64-emac 54 - amlogic,meson6-dwmac 55 - amlogic,meson8b-dwmac 56 - amlogic,meson8m2-dwmac 57 - amlogic,meson-gxbb-dwmac 58 - amlogic,meson-axg-dwmac 59 - snps,dwmac 60 - snps,dwmac-3.50a 61 - snps,dwmac-3.610 62 - snps,dwmac-3.70a 63 - snps,dwmac-3.710 64 - snps,dwmac-4.00 65 - snps,dwmac-4.10a 66 - snps,dwmac-4.20a 67 - snps,dwxgmac 68 - snps,dwxgmac-2.10 69 70 reg: 71 minItems: 1 72 maxItems: 2 73 74 interrupts: 75 minItems: 1 76 maxItems: 3 77 items: 78 - description: Combined signal for various interrupt events 79 - description: The interrupt to manage the remote wake-up packet detection 80 - description: The interrupt that occurs when Rx exits the LPI state 81 82 interrupt-names: 83 minItems: 1 84 maxItems: 3 85 items: 86 - const: macirq 87 - const: eth_wake_irq 88 - const: eth_lpi 89 90 clocks: 91 minItems: 1 92 maxItems: 5 93 additionalItems: true 94 items: 95 - description: GMAC main clock 96 - description: Peripheral registers interface clock 97 - description: 98 PTP reference clock. This clock is used for programming the 99 Timestamp Addend Register. If not passed then the system 100 clock will be used and this is fine on some platforms. 101 102 clock-names: 103 minItems: 1 104 maxItems: 5 105 additionalItems: true 106 contains: 107 enum: 108 - stmmaceth 109 - pclk 110 - ptp_ref 111 112 resets: 113 maxItems: 1 114 description: 115 MAC Reset signal. 116 117 reset-names: 118 const: stmmaceth 119 120 mac-mode: 121 $ref: ethernet-controller.yaml#/properties/phy-connection-type 122 description: 123 The property is identical to 'phy-mode', and assumes that there is mode 124 converter in-between the MAC & PHY (e.g. GMII-to-RGMII). This converter 125 can be passive (no SW requirement), and requires that the MAC operate 126 in a different mode than the PHY in order to function. 127 128 snps,axi-config: 129 $ref: /schemas/types.yaml#/definitions/phandle 130 description: 131 AXI BUS Mode parameters. Phandle to a node that can contain the 132 following properties 133 * snps,lpi_en, enable Low Power Interface 134 * snps,xit_frm, unlock on WoL 135 * snps,wr_osr_lmt, max write outstanding req. limit 136 * snps,rd_osr_lmt, max read outstanding req. limit 137 * snps,kbbe, do not cross 1KiB boundary. 138 * snps,blen, this is a vector of supported burst length. 139 * snps,fb, fixed-burst 140 * snps,mb, mixed-burst 141 * snps,rb, rebuild INCRx Burst 142 143 snps,mtl-rx-config: 144 $ref: /schemas/types.yaml#/definitions/phandle 145 description: 146 Multiple RX Queues parameters. Phandle to a node that can 147 contain the following properties 148 * snps,rx-queues-to-use, number of RX queues to be used in the 149 driver 150 * Choose one of these RX scheduling algorithms 151 * snps,rx-sched-sp, Strict priority 152 * snps,rx-sched-wsp, Weighted Strict priority 153 * For each RX queue 154 * Choose one of these modes 155 * snps,dcb-algorithm, Queue to be enabled as DCB 156 * snps,avb-algorithm, Queue to be enabled as AVB 157 * snps,map-to-dma-channel, Channel to map 158 * Specifiy specific packet routing 159 * snps,route-avcp, AV Untagged Control packets 160 * snps,route-ptp, PTP Packets 161 * snps,route-dcbcp, DCB Control Packets 162 * snps,route-up, Untagged Packets 163 * snps,route-multi-broad, Multicast & Broadcast Packets 164 * snps,priority, bitmask of the tagged frames priorities assigned to 165 the queue 166 167 snps,mtl-tx-config: 168 $ref: /schemas/types.yaml#/definitions/phandle 169 description: 170 Multiple TX Queues parameters. Phandle to a node that can 171 contain the following properties 172 * snps,tx-queues-to-use, number of TX queues to be used in the 173 driver 174 * Choose one of these TX scheduling algorithms 175 * snps,tx-sched-wrr, Weighted Round Robin 176 * snps,tx-sched-wfq, Weighted Fair Queuing 177 * snps,tx-sched-dwrr, Deficit Weighted Round Robin 178 * snps,tx-sched-sp, Strict priority 179 * For each TX queue 180 * snps,weight, TX queue weight (if using a DCB weight 181 algorithm) 182 * Choose one of these modes 183 * snps,dcb-algorithm, TX queue will be working in DCB 184 * snps,avb-algorithm, TX queue will be working in AVB 185 [Attention] Queue 0 is reserved for legacy traffic 186 and so no AVB is available in this queue. 187 * Configure Credit Base Shaper (if AVB Mode selected) 188 * snps,send_slope, enable Low Power Interface 189 * snps,idle_slope, unlock on WoL 190 * snps,high_credit, max write outstanding req. limit 191 * snps,low_credit, max read outstanding req. limit 192 * snps,priority, bitmask of the priorities assigned to the queue. 193 When a PFC frame is received with priorities matching the bitmask, 194 the queue is blocked from transmitting for the pause time specified 195 in the PFC frame. 196 197 snps,reset-gpio: 198 deprecated: true 199 maxItems: 1 200 description: 201 PHY Reset GPIO 202 203 snps,reset-active-low: 204 deprecated: true 205 $ref: /schemas/types.yaml#/definitions/flag 206 description: 207 Indicates that the PHY Reset is active low 208 209 snps,reset-delays-us: 210 deprecated: true 211 description: 212 Triplet of delays. The 1st cell is reset pre-delay in micro 213 seconds. The 2nd cell is reset pulse in micro seconds. The 3rd 214 cell is reset post-delay in micro seconds. 215 $ref: /schemas/types.yaml#/definitions/uint32-array 216 minItems: 3 217 maxItems: 3 218 219 snps,aal: 220 $ref: /schemas/types.yaml#/definitions/flag 221 description: 222 Use Address-Aligned Beats 223 224 snps,fixed-burst: 225 $ref: /schemas/types.yaml#/definitions/flag 226 description: 227 Program the DMA to use the fixed burst mode 228 229 snps,mixed-burst: 230 $ref: /schemas/types.yaml#/definitions/flag 231 description: 232 Program the DMA to use the mixed burst mode 233 234 snps,force_thresh_dma_mode: 235 $ref: /schemas/types.yaml#/definitions/flag 236 description: 237 Force DMA to use the threshold mode for both tx and rx 238 239 snps,force_sf_dma_mode: 240 $ref: /schemas/types.yaml#/definitions/flag 241 description: 242 Force DMA to use the Store and Forward mode for both tx and 243 rx. This flag is ignored if force_thresh_dma_mode is set. 244 245 snps,en-tx-lpi-clockgating: 246 $ref: /schemas/types.yaml#/definitions/flag 247 description: 248 Enable gating of the MAC TX clock during TX low-power mode 249 250 snps,multicast-filter-bins: 251 $ref: /schemas/types.yaml#/definitions/uint32 252 description: 253 Number of multicast filter hash bins supported by this device 254 instance 255 256 snps,perfect-filter-entries: 257 $ref: /schemas/types.yaml#/definitions/uint32 258 description: 259 Number of perfect filter entries supported by this device 260 instance 261 262 snps,ps-speed: 263 $ref: /schemas/types.yaml#/definitions/uint32 264 description: 265 Port selection speed that can be passed to the core when PCS 266 is supported. For example, this is used in case of SGMII and 267 MAC2MAC connection. 268 269 mdio: 270 type: object 271 description: 272 Creates and registers an MDIO bus. 273 274 properties: 275 compatible: 276 const: snps,dwmac-mdio 277 278 required: 279 - compatible 280 281required: 282 - compatible 283 - reg 284 - interrupts 285 - interrupt-names 286 - phy-mode 287 288dependencies: 289 snps,reset-active-low: ["snps,reset-gpio"] 290 snps,reset-delay-us: ["snps,reset-gpio"] 291 292allOf: 293 - $ref: "ethernet-controller.yaml#" 294 - if: 295 properties: 296 compatible: 297 contains: 298 enum: 299 - allwinner,sun7i-a20-gmac 300 - allwinner,sun8i-a83t-emac 301 - allwinner,sun8i-h3-emac 302 - allwinner,sun8i-r40-emac 303 - allwinner,sun8i-v3s-emac 304 - allwinner,sun50i-a64-emac 305 - snps,dwxgmac 306 - snps,dwxgmac-2.10 307 - st,spear600-gmac 308 309 then: 310 properties: 311 snps,pbl: 312 description: 313 Programmable Burst Length (tx and rx) 314 $ref: /schemas/types.yaml#/definitions/uint32 315 enum: [2, 4, 8] 316 317 snps,txpbl: 318 description: 319 Tx Programmable Burst Length. If set, DMA tx will use this 320 value rather than snps,pbl. 321 $ref: /schemas/types.yaml#/definitions/uint32 322 enum: [2, 4, 8] 323 324 snps,rxpbl: 325 description: 326 Rx Programmable Burst Length. If set, DMA rx will use this 327 value rather than snps,pbl. 328 $ref: /schemas/types.yaml#/definitions/uint32 329 enum: [2, 4, 8] 330 331 snps,no-pbl-x8: 332 $ref: /schemas/types.yaml#/definitions/flag 333 description: 334 Don\'t multiply the pbl/txpbl/rxpbl values by 8. For core 335 rev < 3.50, don\'t multiply the values by 4. 336 337 - if: 338 properties: 339 compatible: 340 contains: 341 enum: 342 - allwinner,sun7i-a20-gmac 343 - allwinner,sun8i-a83t-emac 344 - allwinner,sun8i-h3-emac 345 - allwinner,sun8i-r40-emac 346 - allwinner,sun8i-v3s-emac 347 - allwinner,sun50i-a64-emac 348 - snps,dwmac-4.00 349 - snps,dwmac-4.10a 350 - snps,dwmac-4.20a 351 - snps,dwxgmac 352 - snps,dwxgmac-2.10 353 - st,spear600-gmac 354 355 then: 356 properties: 357 snps,tso: 358 $ref: /schemas/types.yaml#/definitions/flag 359 description: 360 Enables the TSO feature otherwise it will be managed by 361 MAC HW capability register. 362 363additionalProperties: true 364 365examples: 366 - | 367 stmmac_axi_setup: stmmac-axi-config { 368 snps,wr_osr_lmt = <0xf>; 369 snps,rd_osr_lmt = <0xf>; 370 snps,blen = <256 128 64 32 0 0 0>; 371 }; 372 373 mtl_rx_setup: rx-queues-config { 374 snps,rx-queues-to-use = <1>; 375 snps,rx-sched-sp; 376 queue0 { 377 snps,dcb-algorithm; 378 snps,map-to-dma-channel = <0x0>; 379 snps,priority = <0x0>; 380 }; 381 }; 382 383 mtl_tx_setup: tx-queues-config { 384 snps,tx-queues-to-use = <2>; 385 snps,tx-sched-wrr; 386 queue0 { 387 snps,weight = <0x10>; 388 snps,dcb-algorithm; 389 snps,priority = <0x0>; 390 }; 391 392 queue1 { 393 snps,avb-algorithm; 394 snps,send_slope = <0x1000>; 395 snps,idle_slope = <0x1000>; 396 snps,high_credit = <0x3E800>; 397 snps,low_credit = <0xFFC18000>; 398 snps,priority = <0x1>; 399 }; 400 }; 401 402 gmac0: ethernet@e0800000 { 403 compatible = "snps,dwxgmac-2.10", "snps,dwxgmac"; 404 reg = <0xe0800000 0x8000>; 405 interrupt-parent = <&vic1>; 406 interrupts = <24 23 22>; 407 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi"; 408 mac-address = [000000000000]; /* Filled in by U-Boot */ 409 max-frame-size = <3800>; 410 phy-mode = "gmii"; 411 snps,multicast-filter-bins = <256>; 412 snps,perfect-filter-entries = <128>; 413 rx-fifo-depth = <16384>; 414 tx-fifo-depth = <16384>; 415 clocks = <&clock>; 416 clock-names = "stmmaceth"; 417 snps,axi-config = <&stmmac_axi_setup>; 418 snps,mtl-rx-config = <&mtl_rx_setup>; 419 snps,mtl-tx-config = <&mtl_tx_setup>; 420 mdio0 { 421 #address-cells = <1>; 422 #size-cells = <0>; 423 compatible = "snps,dwmac-mdio"; 424 phy1: ethernet-phy@0 { 425 reg = <0>; 426 }; 427 }; 428 }; 429 430# FIXME: We should set it, but it would report all the generic 431# properties as additional properties. 432# additionalProperties: false 433 434... 435