1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: "http://devicetree.org/schemas/net/rockchip-dwmac.yaml#" 5$schema: "http://devicetree.org/meta-schemas/core.yaml#" 6 7title: Rockchip 10/100/1000 Ethernet driver(GMAC) 8 9maintainers: 10 - David Wu <david.wu@rock-chips.com> 11 12# We need a select here so we don't match all nodes with 'snps,dwmac' 13select: 14 properties: 15 compatible: 16 contains: 17 enum: 18 - rockchip,px30-gmac 19 - rockchip,rk3128-gmac 20 - rockchip,rk3228-gmac 21 - rockchip,rk3288-gmac 22 - rockchip,rk3308-gmac 23 - rockchip,rk3328-gmac 24 - rockchip,rk3366-gmac 25 - rockchip,rk3368-gmac 26 - rockchip,rk3399-gmac 27 - rockchip,rv1108-gmac 28 required: 29 - compatible 30 31allOf: 32 - $ref: "snps,dwmac.yaml#" 33 34properties: 35 compatible: 36 items: 37 - enum: 38 - rockchip,px30-gmac 39 - rockchip,rk3128-gmac 40 - rockchip,rk3228-gmac 41 - rockchip,rk3288-gmac 42 - rockchip,rk3308-gmac 43 - rockchip,rk3328-gmac 44 - rockchip,rk3366-gmac 45 - rockchip,rk3368-gmac 46 - rockchip,rk3399-gmac 47 - rockchip,rv1108-gmac 48 49 clocks: 50 minItems: 5 51 maxItems: 8 52 53 clock-names: 54 contains: 55 enum: 56 - stmmaceth 57 - mac_clk_tx 58 - mac_clk_rx 59 - aclk_mac 60 - pclk_mac 61 - clk_mac_ref 62 - clk_mac_refout 63 - clk_mac_speed 64 65 clock_in_out: 66 description: 67 For RGMII, it must be "input", means main clock(125MHz) 68 is not sourced from SoC's PLL, but input from PHY. 69 For RMII, "input" means PHY provides the reference clock(50MHz), 70 "output" means GMAC provides the reference clock. 71 $ref: /schemas/types.yaml#/definitions/string 72 enum: [input, output] 73 74 rockchip,grf: 75 description: The phandle of the syscon node for the general register file. 76 $ref: /schemas/types.yaml#/definitions/phandle 77 78 tx_delay: 79 description: Delay value for TXD timing. Range value is 0~0x7F, 0x30 as default. 80 $ref: /schemas/types.yaml#/definitions/uint32 81 82 rx_delay: 83 description: Delay value for RXD timing. Range value is 0~0x7F, 0x10 as default. 84 $ref: /schemas/types.yaml#/definitions/uint32 85 86 phy-supply: 87 description: PHY regulator 88 89required: 90 - compatible 91 - clocks 92 - clock-names 93 94unevaluatedProperties: false 95 96examples: 97 - | 98 #include <dt-bindings/interrupt-controller/arm-gic.h> 99 #include <dt-bindings/clock/rk3288-cru.h> 100 101 gmac: ethernet@ff290000 { 102 compatible = "rockchip,rk3288-gmac"; 103 reg = <0xff290000 0x10000>; 104 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 105 interrupt-names = "macirq"; 106 clocks = <&cru SCLK_MAC>, 107 <&cru SCLK_MAC_RX>, <&cru SCLK_MAC_TX>, 108 <&cru SCLK_MACREF>, <&cru SCLK_MACREF_OUT>, 109 <&cru ACLK_GMAC>, <&cru PCLK_GMAC>; 110 clock-names = "stmmaceth", 111 "mac_clk_rx", "mac_clk_tx", 112 "clk_mac_ref", "clk_mac_refout", 113 "aclk_mac", "pclk_mac"; 114 assigned-clocks = <&cru SCLK_MAC>; 115 assigned-clock-parents = <&ext_gmac>; 116 117 rockchip,grf = <&grf>; 118 phy-mode = "rgmii"; 119 clock_in_out = "input"; 120 tx_delay = <0x30>; 121 rx_delay = <0x10>; 122 }; 123