1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/net/renesas,etheravb.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Renesas Ethernet AVB 8 9maintainers: 10 - Sergei Shtylyov <sergei.shtylyov@gmail.com> 11 12properties: 13 compatible: 14 oneOf: 15 - items: 16 - enum: 17 - renesas,etheravb-r8a7742 # RZ/G1H 18 - renesas,etheravb-r8a7743 # RZ/G1M 19 - renesas,etheravb-r8a7744 # RZ/G1N 20 - renesas,etheravb-r8a7745 # RZ/G1E 21 - renesas,etheravb-r8a77470 # RZ/G1C 22 - renesas,etheravb-r8a7790 # R-Car H2 23 - renesas,etheravb-r8a7791 # R-Car M2-W 24 - renesas,etheravb-r8a7792 # R-Car V2H 25 - renesas,etheravb-r8a7793 # R-Car M2-N 26 - renesas,etheravb-r8a7794 # R-Car E2 27 - const: renesas,etheravb-rcar-gen2 # R-Car Gen2 and RZ/G1 28 29 - items: 30 - enum: 31 - renesas,etheravb-r8a774a1 # RZ/G2M 32 - renesas,etheravb-r8a774b1 # RZ/G2N 33 - renesas,etheravb-r8a774c0 # RZ/G2E 34 - renesas,etheravb-r8a774e1 # RZ/G2H 35 - renesas,etheravb-r8a7795 # R-Car H3 36 - renesas,etheravb-r8a7796 # R-Car M3-W 37 - renesas,etheravb-r8a77961 # R-Car M3-W+ 38 - renesas,etheravb-r8a77965 # R-Car M3-N 39 - renesas,etheravb-r8a77970 # R-Car V3M 40 - renesas,etheravb-r8a77980 # R-Car V3H 41 - renesas,etheravb-r8a77990 # R-Car E3 42 - renesas,etheravb-r8a77995 # R-Car D3 43 - renesas,etheravb-r8a779a0 # R-Car V3U 44 - const: renesas,etheravb-rcar-gen3 # R-Car Gen3 and RZ/G2 45 46 reg: true 47 48 interrupts: true 49 50 interrupt-names: true 51 52 clocks: 53 maxItems: 1 54 55 iommus: 56 maxItems: 1 57 58 power-domains: 59 maxItems: 1 60 61 resets: 62 maxItems: 1 63 64 phy-mode: true 65 66 phy-handle: true 67 68 '#address-cells': 69 description: Number of address cells for the MDIO bus. 70 const: 1 71 72 '#size-cells': 73 description: Number of size cells on the MDIO bus. 74 const: 0 75 76 renesas,no-ether-link: 77 type: boolean 78 description: 79 Specify when a board does not provide a proper AVB_LINK signal. 80 81 renesas,ether-link-active-low: 82 type: boolean 83 description: 84 Specify when the AVB_LINK signal is active-low instead of normal 85 active-high. 86 87 rx-internal-delay-ps: 88 enum: [0, 1800] 89 90 tx-internal-delay-ps: 91 enum: [0, 2000] 92 93patternProperties: 94 "^ethernet-phy@[0-9a-f]$": 95 type: object 96 $ref: ethernet-phy.yaml# 97 98required: 99 - compatible 100 - reg 101 - interrupts 102 - clocks 103 - power-domains 104 - resets 105 - phy-mode 106 - phy-handle 107 - '#address-cells' 108 - '#size-cells' 109 110allOf: 111 - $ref: ethernet-controller.yaml# 112 113 - if: 114 properties: 115 compatible: 116 contains: 117 enum: 118 - renesas,etheravb-rcar-gen2 119 - renesas,etheravb-r8a7795 120 - renesas,etheravb-r8a7796 121 - renesas,etheravb-r8a77961 122 - renesas,etheravb-r8a77965 123 then: 124 properties: 125 reg: 126 items: 127 - description: MAC register block 128 - description: Stream buffer 129 else: 130 properties: 131 reg: 132 items: 133 - description: MAC register block 134 135 - if: 136 properties: 137 compatible: 138 contains: 139 const: renesas,etheravb-rcar-gen2 140 then: 141 properties: 142 interrupts: 143 maxItems: 1 144 interrupt-names: 145 items: 146 - const: mux 147 rx-internal-delay-ps: false 148 else: 149 properties: 150 interrupts: 151 minItems: 25 152 maxItems: 25 153 interrupt-names: 154 items: 155 pattern: '^ch[0-9]+$' 156 required: 157 - interrupt-names 158 - rx-internal-delay-ps 159 160 - if: 161 properties: 162 compatible: 163 contains: 164 enum: 165 - renesas,etheravb-r8a774a1 166 - renesas,etheravb-r8a774b1 167 - renesas,etheravb-r8a774e1 168 - renesas,etheravb-r8a7795 169 - renesas,etheravb-r8a7796 170 - renesas,etheravb-r8a77961 171 - renesas,etheravb-r8a77965 172 - renesas,etheravb-r8a77970 173 - renesas,etheravb-r8a77980 174 - renesas,etheravb-r8a779a0 175 then: 176 required: 177 - tx-internal-delay-ps 178 else: 179 properties: 180 tx-internal-delay-ps: false 181 182 - if: 183 properties: 184 compatible: 185 contains: 186 const: renesas,etheravb-r8a77995 187 then: 188 properties: 189 rx-internal-delay-ps: 190 const: 1800 191 192 - if: 193 properties: 194 compatible: 195 contains: 196 const: renesas,etheravb-r8a77980 197 then: 198 properties: 199 tx-internal-delay-ps: 200 const: 2000 201 202additionalProperties: false 203 204examples: 205 - | 206 #include <dt-bindings/clock/r8a7795-cpg-mssr.h> 207 #include <dt-bindings/interrupt-controller/arm-gic.h> 208 #include <dt-bindings/power/r8a7795-sysc.h> 209 #include <dt-bindings/gpio/gpio.h> 210 aliases { 211 ethernet0 = &avb; 212 }; 213 214 avb: ethernet@e6800000 { 215 compatible = "renesas,etheravb-r8a7795", 216 "renesas,etheravb-rcar-gen3"; 217 reg = <0xe6800000 0x800>, <0xe6a00000 0x10000>; 218 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 219 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 220 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 221 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 222 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 223 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 224 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 225 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 226 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 227 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 228 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 229 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 230 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 231 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 232 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 233 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 234 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 235 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 236 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 237 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 238 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 239 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 240 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 241 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 242 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 243 interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", 244 "ch7", "ch8", "ch9", "ch10", "ch11", "ch12", 245 "ch13", "ch14", "ch15", "ch16", "ch17", "ch18", 246 "ch19", "ch20", "ch21", "ch22", "ch23", "ch24"; 247 clocks = <&cpg CPG_MOD 812>; 248 iommus = <&ipmmu_ds0 16>; 249 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 250 resets = <&cpg 812>; 251 phy-mode = "rgmii"; 252 phy-handle = <&phy0>; 253 rx-internal-delay-ps = <0>; 254 tx-internal-delay-ps = <2000>; 255 #address-cells = <1>; 256 #size-cells = <0>; 257 258 phy0: ethernet-phy@0 { 259 rxc-skew-ps = <1500>; 260 reg = <0>; 261 interrupt-parent = <&gpio2>; 262 interrupts = <11 IRQ_TYPE_LEVEL_LOW>; 263 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; 264 }; 265 }; 266