1# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/net/qcom,ipa.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm IP Accelerator (IPA) 8 9maintainers: 10 - Alex Elder <elder@kernel.org> 11 12description: 13 This binding describes the Qualcomm IPA. The IPA is capable of offloading 14 certain network processing tasks (e.g. filtering, routing, and NAT) from 15 the main processor. 16 17 The IPA sits between multiple independent "execution environments," 18 including the Application Processor (AP) and the modem. The IPA presents 19 a Generic Software Interface (GSI) to each execution environment. 20 The GSI is an integral part of the IPA, but it is logically isolated 21 and has a distinct interrupt and a separately-defined address space. 22 23 See also soc/qcom/qcom,smp2p.txt and interconnect/interconnect.txt. See 24 iommu/iommu.txt and iommu/arm,smmu.yaml for more information about SMMU 25 bindings. 26 27 28 - | 29 -------- --------- 30 | | | | 31 | AP +<---. .----+ Modem | 32 | +--. | | .->+ | 33 | | | | | | | | 34 -------- | | | | --------- 35 v | v | 36 --+-+---+-+-- 37 | GSI | 38 |-----------| 39 | | 40 | IPA | 41 | | 42 ------------- 43 44properties: 45 compatible: 46 const: "qcom,sdm845-ipa" 47 48 reg: 49 items: 50 - description: IPA registers 51 - description: IPA shared memory 52 - description: GSI registers 53 54 reg-names: 55 items: 56 - const: ipa-reg 57 - const: ipa-shared 58 - const: gsi 59 60 iommus: 61 maxItems: 1 62 63 clocks: 64 maxItems: 1 65 66 clock-names: 67 const: core 68 69 interrupts: 70 items: 71 - description: IPA interrupt (hardware IRQ) 72 - description: GSI interrupt (hardware IRQ) 73 - description: Modem clock query interrupt (smp2p interrupt) 74 - description: Modem setup ready interrupt (smp2p interrupt) 75 76 interrupt-names: 77 items: 78 - const: ipa 79 - const: gsi 80 - const: ipa-clock-query 81 - const: ipa-setup-ready 82 83 interconnects: 84 items: 85 - description: Interconnect path between IPA and main memory 86 - description: Interconnect path between IPA and internal memory 87 - description: Interconnect path between IPA and the AP subsystem 88 89 interconnect-names: 90 items: 91 - const: memory 92 - const: imem 93 - const: config 94 95 qcom,smem-states: 96 $ref: /schemas/types.yaml#/definitions/phandle-array 97 description: State bits used in by the AP to signal the modem. 98 items: 99 - description: Whether the "ipa-clock-enabled" state bit is valid 100 - description: Whether the IPA clock is enabled (if valid) 101 102 qcom,smem-state-names: 103 $ref: /schemas/types.yaml#/definitions/string-array 104 description: The names of the state bits used for SMP2P output 105 items: 106 - const: ipa-clock-enabled-valid 107 - const: ipa-clock-enabled 108 109 modem-init: 110 type: boolean 111 description: 112 If present, it indicates that the modem is responsible for 113 performing early IPA initialization, including loading and 114 validating firwmare used by the GSI. 115 116 memory-region: 117 maxItems: 1 118 description: 119 If present, a phandle for a reserved memory area that holds 120 the firmware passed to Trust Zone for authentication. Required 121 when Trust Zone (not the modem) performs early initialization. 122 123required: 124 - compatible 125 - iommus 126 - reg 127 - clocks 128 - interrupts 129 - interconnects 130 - qcom,smem-states 131 132oneOf: 133 - required: 134 - modem-init 135 - required: 136 - memory-region 137 138additionalProperties: false 139 140examples: 141 - | 142 #include <dt-bindings/interrupt-controller/arm-gic.h> 143 #include <dt-bindings/clock/qcom,rpmh.h> 144 #include <dt-bindings/interconnect/qcom,sdm845.h> 145 146 smp2p-mpss { 147 compatible = "qcom,smp2p"; 148 ipa_smp2p_out: ipa-ap-to-modem { 149 qcom,entry-name = "ipa"; 150 #qcom,smem-state-cells = <1>; 151 }; 152 153 ipa_smp2p_in: ipa-modem-to-ap { 154 qcom,entry-name = "ipa"; 155 interrupt-controller; 156 #interrupt-cells = <2>; 157 }; 158 }; 159 ipa@1e40000 { 160 compatible = "qcom,sdm845-ipa"; 161 162 modem-init; 163 164 iommus = <&apps_smmu 0x720 0x3>; 165 reg = <0x1e40000 0x7000>, 166 <0x1e47000 0x2000>, 167 <0x1e04000 0x2c000>; 168 reg-names = "ipa-reg", 169 "ipa-shared", 170 "gsi"; 171 172 interrupts-extended = <&intc GIC_SPI 311 IRQ_TYPE_EDGE_RISING>, 173 <&intc GIC_SPI 432 IRQ_TYPE_LEVEL_HIGH>, 174 <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, 175 <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>; 176 interrupt-names = "ipa", 177 "gsi", 178 "ipa-clock-query", 179 "ipa-setup-ready"; 180 181 clocks = <&rpmhcc RPMH_IPA_CLK>; 182 clock-names = "core"; 183 184 interconnects = 185 <&rsc_hlos MASTER_IPA &rsc_hlos SLAVE_EBI1>, 186 <&rsc_hlos MASTER_IPA &rsc_hlos SLAVE_IMEM>, 187 <&rsc_hlos MASTER_APPSS_PROC &rsc_hlos SLAVE_IPA_CFG>; 188 interconnect-names = "memory", 189 "imem", 190 "config"; 191 192 qcom,smem-states = <&ipa_smp2p_out 0>, 193 <&ipa_smp2p_out 1>; 194 qcom,smem-state-names = "ipa-clock-enabled-valid", 195 "ipa-clock-enabled"; 196 }; 197