1# SPDX-License-Identifier: GPL-2.0+
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/qca,ar803x.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Atheros AR803x PHY
8
9maintainers:
10  - Andrew Lunn <andrew@lunn.ch>
11  - Florian Fainelli <f.fainelli@gmail.com>
12  - Heiner Kallweit <hkallweit1@gmail.com>
13
14description: |
15  Bindings for Qualcomm Atheros AR803x PHYs
16
17allOf:
18  - $ref: ethernet-phy.yaml#
19
20properties:
21  qca,clk-out-frequency:
22    description: Clock output frequency in Hertz.
23    $ref: /schemas/types.yaml#/definitions/uint32
24    enum: [25000000, 50000000, 62500000, 125000000]
25
26  qca,clk-out-strength:
27    description: Clock output driver strength.
28    $ref: /schemas/types.yaml#/definitions/uint32
29    enum: [0, 1, 2]
30
31  qca,keep-pll-enabled:
32    description: |
33      If set, keep the PLL enabled even if there is no link. Useful if you
34      want to use the clock output without an ethernet link.
35
36      Only supported on the AR8031.
37    type: boolean
38
39  vddio-supply:
40    description: |
41      RGMII I/O voltage regulator (see regulator/regulator.yaml).
42
43      The PHY supports RGMII I/O voltages of 1.5V, 1.8V and 2.5V. You can
44      either connect this to the vddio-regulator (1.5V / 1.8V) or the
45      vddh-regulator (2.5V).
46
47      Only supported on the AR8031.
48
49  vddio-regulator:
50    type: object
51    description:
52      Initial data for the VDDIO regulator. Set this to 1.5V or 1.8V.
53    $ref: /schemas/regulator/regulator.yaml
54
55  vddh-regulator:
56    type: object
57    description:
58      Dummy subnode to model the external connection of the PHY VDDH
59      regulator to VDDIO.
60    $ref: /schemas/regulator/regulator.yaml
61
62unevaluatedProperties: false
63
64examples:
65  - |
66    #include <dt-bindings/net/qca-ar803x.h>
67
68    ethernet {
69        #address-cells = <1>;
70        #size-cells = <0>;
71
72        phy-mode = "rgmii-id";
73
74        ethernet-phy@0 {
75            reg = <0>;
76
77            qca,clk-out-frequency = <125000000>;
78            qca,clk-out-strength = <AR803X_STRENGTH_FULL>;
79
80            vddio-supply = <&vddio>;
81
82            vddio: vddio-regulator {
83                regulator-min-microvolt = <1800000>;
84                regulator-max-microvolt = <1800000>;
85            };
86        };
87    };
88  - |
89    #include <dt-bindings/net/qca-ar803x.h>
90
91    ethernet {
92        #address-cells = <1>;
93        #size-cells = <0>;
94
95        phy-mode = "rgmii-id";
96
97        ethernet-phy@0 {
98            reg = <0>;
99
100            qca,clk-out-frequency = <50000000>;
101            qca,keep-pll-enabled;
102
103            vddio-supply = <&vddh>;
104
105            vddh: vddh-regulator {
106            };
107        };
108    };
109