1e314a07eSJoakim Zhang# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2e314a07eSJoakim Zhang%YAML 1.2 3e314a07eSJoakim Zhang--- 4e314a07eSJoakim Zhang$id: http://devicetree.org/schemas/net/nxp,dwmac-imx.yaml# 5e314a07eSJoakim Zhang$schema: http://devicetree.org/meta-schemas/core.yaml# 6e314a07eSJoakim Zhang 7e314a07eSJoakim Zhangtitle: NXP i.MX8 DWMAC glue layer Device Tree Bindings 8e314a07eSJoakim Zhang 9e314a07eSJoakim Zhangmaintainers: 10e314a07eSJoakim Zhang - Joakim Zhang <qiangqing.zhang@nxp.com> 11e314a07eSJoakim Zhang 12e314a07eSJoakim Zhang# We need a select here so we don't match all nodes with 'snps,dwmac' 13e314a07eSJoakim Zhangselect: 14e314a07eSJoakim Zhang properties: 15e314a07eSJoakim Zhang compatible: 16e314a07eSJoakim Zhang contains: 17e314a07eSJoakim Zhang enum: 18e314a07eSJoakim Zhang - nxp,imx8mp-dwmac-eqos 19e314a07eSJoakim Zhang - nxp,imx8dxl-dwmac-eqos 20e314a07eSJoakim Zhang required: 21e314a07eSJoakim Zhang - compatible 22e314a07eSJoakim Zhang 23e314a07eSJoakim ZhangallOf: 24e314a07eSJoakim Zhang - $ref: "snps,dwmac.yaml#" 25e314a07eSJoakim Zhang 26e314a07eSJoakim Zhangproperties: 27e314a07eSJoakim Zhang compatible: 28e314a07eSJoakim Zhang oneOf: 29e314a07eSJoakim Zhang - items: 30e314a07eSJoakim Zhang - enum: 31e314a07eSJoakim Zhang - nxp,imx8mp-dwmac-eqos 32e314a07eSJoakim Zhang - nxp,imx8dxl-dwmac-eqos 33e314a07eSJoakim Zhang - const: snps,dwmac-5.10a 34e314a07eSJoakim Zhang 35e314a07eSJoakim Zhang clocks: 36e314a07eSJoakim Zhang minItems: 3 37e314a07eSJoakim Zhang items: 38e314a07eSJoakim Zhang - description: MAC host clock 39e314a07eSJoakim Zhang - description: MAC apb clock 40e314a07eSJoakim Zhang - description: MAC timer clock 41e314a07eSJoakim Zhang - description: MAC RGMII TX clock 42e314a07eSJoakim Zhang - description: EQOS MEM clock 43e314a07eSJoakim Zhang 44e314a07eSJoakim Zhang clock-names: 45e314a07eSJoakim Zhang minItems: 3 46e314a07eSJoakim Zhang maxItems: 5 47e314a07eSJoakim Zhang contains: 48e314a07eSJoakim Zhang enum: 49e314a07eSJoakim Zhang - stmmaceth 50e314a07eSJoakim Zhang - pclk 51e314a07eSJoakim Zhang - ptp_ref 52e314a07eSJoakim Zhang - tx 53e314a07eSJoakim Zhang - mem 54e314a07eSJoakim Zhang 55e314a07eSJoakim Zhang intf_mode: 56e314a07eSJoakim Zhang $ref: /schemas/types.yaml#/definitions/phandle-array 57*39bd2b6aSRob Herring items: 58*39bd2b6aSRob Herring - items: 59*39bd2b6aSRob Herring - description: phandle to the GPR syscon 60*39bd2b6aSRob Herring - description: the offset of the GPR register 61e314a07eSJoakim Zhang description: 62e314a07eSJoakim Zhang Should be phandle/offset pair. The phandle to the syscon node which 63e314a07eSJoakim Zhang encompases the GPR register, and the offset of the GPR register. 64e314a07eSJoakim Zhang 65e314a07eSJoakim Zhang snps,rmii_refclk_ext: 66e314a07eSJoakim Zhang $ref: /schemas/types.yaml#/definitions/flag 67e314a07eSJoakim Zhang description: 68e314a07eSJoakim Zhang To select RMII reference clock from external. 69e314a07eSJoakim Zhang 70e314a07eSJoakim Zhangrequired: 71e314a07eSJoakim Zhang - compatible 72e314a07eSJoakim Zhang - clocks 73e314a07eSJoakim Zhang - clock-names 74e314a07eSJoakim Zhang 75e314a07eSJoakim ZhangunevaluatedProperties: false 76e314a07eSJoakim Zhang 77e314a07eSJoakim Zhangexamples: 78e314a07eSJoakim Zhang - | 79e314a07eSJoakim Zhang #include <dt-bindings/interrupt-controller/arm-gic.h> 80e314a07eSJoakim Zhang #include <dt-bindings/interrupt-controller/irq.h> 81e314a07eSJoakim Zhang #include <dt-bindings/clock/imx8mp-clock.h> 82e314a07eSJoakim Zhang 83e314a07eSJoakim Zhang eqos: ethernet@30bf0000 { 84e314a07eSJoakim Zhang compatible = "nxp,imx8mp-dwmac-eqos","snps,dwmac-5.10a"; 85e314a07eSJoakim Zhang reg = <0x30bf0000 0x10000>; 86e314a07eSJoakim Zhang interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, 87e314a07eSJoakim Zhang <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>; 88e314a07eSJoakim Zhang interrupt-names = "macirq", "eth_wake_irq"; 89e314a07eSJoakim Zhang clocks = <&clk IMX8MP_CLK_ENET_QOS_ROOT>, 90e314a07eSJoakim Zhang <&clk IMX8MP_CLK_QOS_ENET_ROOT>, 91e314a07eSJoakim Zhang <&clk IMX8MP_CLK_ENET_QOS_TIMER>, 92e314a07eSJoakim Zhang <&clk IMX8MP_CLK_ENET_QOS>; 93e314a07eSJoakim Zhang clock-names = "stmmaceth", "pclk", "ptp_ref", "tx"; 94e314a07eSJoakim Zhang phy-mode = "rgmii"; 95e314a07eSJoakim Zhang status = "disabled"; 96e314a07eSJoakim Zhang }; 97