1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/net/microchip,lan966x-switch.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Microchip Lan966x Ethernet switch controller 8 9maintainers: 10 - Horatiu Vultur <horatiu.vultur@microchip.com> 11 12description: | 13 The lan966x switch is a multi-port Gigabit AVB/TSN Ethernet Switch with 14 two integrated 10/100/1000Base-T PHYs. In addition to the integrated PHYs, 15 it supports up to 2RGMII/RMII, up to 3BASE-X/SERDES/2.5GBASE-X and up to 16 2 Quad-SGMII/Quad-USGMII interfaces. 17 18properties: 19 $nodename: 20 pattern: "^switch@[0-9a-f]+$" 21 22 compatible: 23 const: microchip,lan966x-switch 24 25 reg: 26 items: 27 - description: cpu target 28 - description: general control block target 29 30 reg-names: 31 items: 32 - const: cpu 33 - const: gcb 34 35 interrupts: 36 minItems: 1 37 items: 38 - description: register based extraction 39 - description: frame dma based extraction 40 - description: analyzer interrupt 41 42 interrupt-names: 43 minItems: 1 44 items: 45 - const: xtr 46 - const: fdma 47 - const: ana 48 49 resets: 50 items: 51 - description: Reset controller used for switch core reset (soft reset) 52 - description: Reset controller used for releasing the phy from reset 53 54 reset-names: 55 items: 56 - const: switch 57 - const: phy 58 59 ethernet-ports: 60 type: object 61 62 properties: 63 '#address-cells': 64 const: 1 65 '#size-cells': 66 const: 0 67 68 additionalProperties: false 69 70 patternProperties: 71 "^port@[0-9a-f]+$": 72 type: object 73 74 $ref: "/schemas/net/ethernet-controller.yaml#" 75 unevaluatedProperties: false 76 77 properties: 78 '#address-cells': 79 const: 1 80 '#size-cells': 81 const: 0 82 83 reg: 84 description: 85 Switch port number 86 87 phys: 88 description: 89 Phandle of a Ethernet SerDes PHY 90 91 phy-mode: 92 description: 93 This specifies the interface used by the Ethernet SerDes towards 94 the PHY or SFP. 95 enum: 96 - gmii 97 - sgmii 98 - qsgmii 99 - 1000base-x 100 - 2500base-x 101 102 phy-handle: 103 description: 104 Phandle of a Ethernet PHY. 105 106 sfp: 107 description: 108 Phandle of an SFP. 109 110 managed: true 111 112 required: 113 - reg 114 - phys 115 - phy-mode 116 117 oneOf: 118 - required: 119 - phy-handle 120 - required: 121 - sfp 122 - managed 123 124required: 125 - compatible 126 - reg 127 - reg-names 128 - interrupts 129 - interrupt-names 130 - resets 131 - reset-names 132 - ethernet-ports 133 134additionalProperties: false 135 136examples: 137 - | 138 #include <dt-bindings/interrupt-controller/arm-gic.h> 139 switch: switch@e0000000 { 140 compatible = "microchip,lan966x-switch"; 141 reg = <0xe0000000 0x0100000>, 142 <0xe2000000 0x0800000>; 143 reg-names = "cpu", "gcb"; 144 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 145 interrupt-names = "xtr"; 146 resets = <&switch_reset 0>, <&phy_reset 0>; 147 reset-names = "switch", "phy"; 148 ethernet-ports { 149 #address-cells = <1>; 150 #size-cells = <0>; 151 152 port0: port@0 { 153 reg = <0>; 154 phy-handle = <&phy0>; 155 phys = <&serdes 0 0>; 156 phy-mode = "gmii"; 157 }; 158 159 port1: port@1 { 160 reg = <1>; 161 sfp = <&sfp_eth1>; 162 managed = "in-band-status"; 163 phys = <&serdes 2 4>; 164 phy-mode = "sgmii"; 165 }; 166 }; 167 }; 168 169... 170