1c78c5a66SLorenzo Bianconi# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2c78c5a66SLorenzo Bianconi%YAML 1.2 3c78c5a66SLorenzo Bianconi--- 4c78c5a66SLorenzo Bianconi$id: http://devicetree.org/schemas/net/mediatek,net.yaml# 5c78c5a66SLorenzo Bianconi$schema: http://devicetree.org/meta-schemas/core.yaml# 6c78c5a66SLorenzo Bianconi 7c78c5a66SLorenzo Bianconititle: MediaTek Frame Engine Ethernet controller 8c78c5a66SLorenzo Bianconi 9c78c5a66SLorenzo Bianconimaintainers: 10c78c5a66SLorenzo Bianconi - Lorenzo Bianconi <lorenzo@kernel.org> 11c78c5a66SLorenzo Bianconi - Felix Fietkau <nbd@nbd.name> 12c78c5a66SLorenzo Bianconi 13c78c5a66SLorenzo Bianconidescription: 14c78c5a66SLorenzo Bianconi The frame engine ethernet controller can be found on MediaTek SoCs. These SoCs 15c78c5a66SLorenzo Bianconi have dual GMAC ports. 16c78c5a66SLorenzo Bianconi 17c78c5a66SLorenzo Bianconiproperties: 18c78c5a66SLorenzo Bianconi compatible: 19c78c5a66SLorenzo Bianconi enum: 20c78c5a66SLorenzo Bianconi - mediatek,mt2701-eth 21c78c5a66SLorenzo Bianconi - mediatek,mt7623-eth 22c78c5a66SLorenzo Bianconi - mediatek,mt7622-eth 23c78c5a66SLorenzo Bianconi - mediatek,mt7629-eth 24e3ac1c27SDaniel Golle - mediatek,mt7981-eth 254b139b75SLorenzo Bianconi - mediatek,mt7986-eth 26c78c5a66SLorenzo Bianconi - ralink,rt5350-eth 27c78c5a66SLorenzo Bianconi 28c78c5a66SLorenzo Bianconi reg: 29c78c5a66SLorenzo Bianconi maxItems: 1 30c78c5a66SLorenzo Bianconi 310a1e19c8SRob Herring clocks: true 320a1e19c8SRob Herring clock-names: true 330a1e19c8SRob Herring 34c78c5a66SLorenzo Bianconi interrupts: 35c78c5a66SLorenzo Bianconi minItems: 3 364b139b75SLorenzo Bianconi maxItems: 4 37c78c5a66SLorenzo Bianconi 38c78c5a66SLorenzo Bianconi power-domains: 39c78c5a66SLorenzo Bianconi maxItems: 1 40c78c5a66SLorenzo Bianconi 41c78c5a66SLorenzo Bianconi resets: 42c78c5a66SLorenzo Bianconi maxItems: 3 43c78c5a66SLorenzo Bianconi 44c78c5a66SLorenzo Bianconi reset-names: 45c78c5a66SLorenzo Bianconi items: 46c78c5a66SLorenzo Bianconi - const: fe 47c78c5a66SLorenzo Bianconi - const: gmac 48c78c5a66SLorenzo Bianconi - const: ppe 49c78c5a66SLorenzo Bianconi 50c78c5a66SLorenzo Bianconi mediatek,ethsys: 51c78c5a66SLorenzo Bianconi $ref: /schemas/types.yaml#/definitions/phandle 52c78c5a66SLorenzo Bianconi description: 53c78c5a66SLorenzo Bianconi Phandle to the syscon node that handles the port setup. 54c78c5a66SLorenzo Bianconi 55c78c5a66SLorenzo Bianconi cci-control-port: true 56c78c5a66SLorenzo Bianconi 57c78c5a66SLorenzo Bianconi mediatek,hifsys: 58c78c5a66SLorenzo Bianconi $ref: /schemas/types.yaml#/definitions/phandle 59c78c5a66SLorenzo Bianconi description: 60c78c5a66SLorenzo Bianconi Phandle to the mediatek hifsys controller used to provide various clocks 61c78c5a66SLorenzo Bianconi and reset to the system. 62c78c5a66SLorenzo Bianconi 63c78c5a66SLorenzo Bianconi mediatek,sgmiisys: 64c78c5a66SLorenzo Bianconi $ref: /schemas/types.yaml#/definitions/phandle-array 65c78c5a66SLorenzo Bianconi minItems: 1 66c78c5a66SLorenzo Bianconi maxItems: 2 67c78c5a66SLorenzo Bianconi items: 68c78c5a66SLorenzo Bianconi maxItems: 1 69c78c5a66SLorenzo Bianconi description: 70c78c5a66SLorenzo Bianconi A list of phandle to the syscon node that handles the SGMII setup which is required for 71c78c5a66SLorenzo Bianconi those SoCs equipped with SGMII. 72c78c5a66SLorenzo Bianconi 7322ecfce1SLorenzo Bianconi mediatek,wed: 7422ecfce1SLorenzo Bianconi $ref: /schemas/types.yaml#/definitions/phandle-array 7522ecfce1SLorenzo Bianconi minItems: 2 7622ecfce1SLorenzo Bianconi maxItems: 2 7722ecfce1SLorenzo Bianconi items: 7822ecfce1SLorenzo Bianconi maxItems: 1 7922ecfce1SLorenzo Bianconi description: 8022ecfce1SLorenzo Bianconi List of phandles to wireless ethernet dispatch nodes. 8122ecfce1SLorenzo Bianconi 82e3ac1c27SDaniel Golle mediatek,wed-pcie: 83e3ac1c27SDaniel Golle $ref: /schemas/types.yaml#/definitions/phandle 84e3ac1c27SDaniel Golle description: 85e3ac1c27SDaniel Golle Phandle to the mediatek wed-pcie controller. 86e3ac1c27SDaniel Golle 87c78c5a66SLorenzo Bianconi dma-coherent: true 88c78c5a66SLorenzo Bianconi 89c78c5a66SLorenzo Bianconi mdio-bus: 90c78c5a66SLorenzo Bianconi $ref: mdio.yaml# 91c78c5a66SLorenzo Bianconi unevaluatedProperties: false 92c78c5a66SLorenzo Bianconi 93c78c5a66SLorenzo Bianconi "#address-cells": 94c78c5a66SLorenzo Bianconi const: 1 95c78c5a66SLorenzo Bianconi 96c78c5a66SLorenzo Bianconi "#size-cells": 97c78c5a66SLorenzo Bianconi const: 0 98c78c5a66SLorenzo Bianconi 99c78c5a66SLorenzo BianconiallOf: 100*3079bfdbSRob Herring - $ref: ethernet-controller.yaml# 101c78c5a66SLorenzo Bianconi - if: 102c78c5a66SLorenzo Bianconi properties: 103c78c5a66SLorenzo Bianconi compatible: 104c78c5a66SLorenzo Bianconi contains: 105c78c5a66SLorenzo Bianconi enum: 106c78c5a66SLorenzo Bianconi - mediatek,mt2701-eth 107c78c5a66SLorenzo Bianconi - mediatek,mt7623-eth 108c78c5a66SLorenzo Bianconi then: 109c78c5a66SLorenzo Bianconi properties: 1104b139b75SLorenzo Bianconi interrupts: 1114b139b75SLorenzo Bianconi maxItems: 3 1124b139b75SLorenzo Bianconi 113c78c5a66SLorenzo Bianconi clocks: 114c78c5a66SLorenzo Bianconi minItems: 4 115c78c5a66SLorenzo Bianconi maxItems: 4 116c78c5a66SLorenzo Bianconi 117c78c5a66SLorenzo Bianconi clock-names: 118c78c5a66SLorenzo Bianconi items: 119c78c5a66SLorenzo Bianconi - const: ethif 120c78c5a66SLorenzo Bianconi - const: esw 121c78c5a66SLorenzo Bianconi - const: gp1 122c78c5a66SLorenzo Bianconi - const: gp2 123c78c5a66SLorenzo Bianconi 124c78c5a66SLorenzo Bianconi mediatek,pctl: 125c78c5a66SLorenzo Bianconi $ref: /schemas/types.yaml#/definitions/phandle 126c78c5a66SLorenzo Bianconi description: 127c78c5a66SLorenzo Bianconi Phandle to the syscon node that handles the ports slew rate and 128c78c5a66SLorenzo Bianconi driver current. 129c78c5a66SLorenzo Bianconi 13022ecfce1SLorenzo Bianconi mediatek,wed: false 13122ecfce1SLorenzo Bianconi 132e3ac1c27SDaniel Golle mediatek,wed-pcie: false 133e3ac1c27SDaniel Golle 134c78c5a66SLorenzo Bianconi - if: 135c78c5a66SLorenzo Bianconi properties: 136c78c5a66SLorenzo Bianconi compatible: 137c78c5a66SLorenzo Bianconi contains: 138c78c5a66SLorenzo Bianconi const: mediatek,mt7622-eth 139c78c5a66SLorenzo Bianconi then: 140c78c5a66SLorenzo Bianconi properties: 1414b139b75SLorenzo Bianconi interrupts: 1424b139b75SLorenzo Bianconi maxItems: 3 1434b139b75SLorenzo Bianconi 144c78c5a66SLorenzo Bianconi clocks: 145c78c5a66SLorenzo Bianconi minItems: 11 146c78c5a66SLorenzo Bianconi maxItems: 11 147c78c5a66SLorenzo Bianconi 148c78c5a66SLorenzo Bianconi clock-names: 149c78c5a66SLorenzo Bianconi items: 150c78c5a66SLorenzo Bianconi - const: ethif 151c78c5a66SLorenzo Bianconi - const: esw 152c78c5a66SLorenzo Bianconi - const: gp0 153c78c5a66SLorenzo Bianconi - const: gp1 154c78c5a66SLorenzo Bianconi - const: gp2 155c78c5a66SLorenzo Bianconi - const: sgmii_tx250m 156c78c5a66SLorenzo Bianconi - const: sgmii_rx250m 157c78c5a66SLorenzo Bianconi - const: sgmii_cdr_ref 158c78c5a66SLorenzo Bianconi - const: sgmii_cdr_fb 159c78c5a66SLorenzo Bianconi - const: sgmii_ck 160c78c5a66SLorenzo Bianconi - const: eth2pll 161c78c5a66SLorenzo Bianconi 162c78c5a66SLorenzo Bianconi mediatek,sgmiisys: 163c78c5a66SLorenzo Bianconi minItems: 1 164c78c5a66SLorenzo Bianconi maxItems: 1 165c78c5a66SLorenzo Bianconi 166c78c5a66SLorenzo Bianconi mediatek,pcie-mirror: 167c78c5a66SLorenzo Bianconi $ref: /schemas/types.yaml#/definitions/phandle 168c78c5a66SLorenzo Bianconi description: 169c78c5a66SLorenzo Bianconi Phandle to the mediatek pcie-mirror controller. 170c78c5a66SLorenzo Bianconi 171e3ac1c27SDaniel Golle mediatek,wed-pcie: false 172e3ac1c27SDaniel Golle 173c78c5a66SLorenzo Bianconi - if: 174c78c5a66SLorenzo Bianconi properties: 175c78c5a66SLorenzo Bianconi compatible: 176c78c5a66SLorenzo Bianconi contains: 177c78c5a66SLorenzo Bianconi const: mediatek,mt7629-eth 178c78c5a66SLorenzo Bianconi then: 179c78c5a66SLorenzo Bianconi properties: 1804b139b75SLorenzo Bianconi interrupts: 1814b139b75SLorenzo Bianconi maxItems: 3 1824b139b75SLorenzo Bianconi 183c78c5a66SLorenzo Bianconi clocks: 184c78c5a66SLorenzo Bianconi minItems: 17 185c78c5a66SLorenzo Bianconi maxItems: 17 186c78c5a66SLorenzo Bianconi 187c78c5a66SLorenzo Bianconi clock-names: 188c78c5a66SLorenzo Bianconi items: 189c78c5a66SLorenzo Bianconi - const: ethif 190c78c5a66SLorenzo Bianconi - const: sgmiitop 191c78c5a66SLorenzo Bianconi - const: esw 192c78c5a66SLorenzo Bianconi - const: gp0 193c78c5a66SLorenzo Bianconi - const: gp1 194c78c5a66SLorenzo Bianconi - const: gp2 195c78c5a66SLorenzo Bianconi - const: fe 196c78c5a66SLorenzo Bianconi - const: sgmii_tx250m 197c78c5a66SLorenzo Bianconi - const: sgmii_rx250m 198c78c5a66SLorenzo Bianconi - const: sgmii_cdr_ref 199c78c5a66SLorenzo Bianconi - const: sgmii_cdr_fb 200c78c5a66SLorenzo Bianconi - const: sgmii2_tx250m 201c78c5a66SLorenzo Bianconi - const: sgmii2_rx250m 202c78c5a66SLorenzo Bianconi - const: sgmii2_cdr_ref 203c78c5a66SLorenzo Bianconi - const: sgmii2_cdr_fb 204c78c5a66SLorenzo Bianconi - const: sgmii_ck 205c78c5a66SLorenzo Bianconi - const: eth2pll 206c78c5a66SLorenzo Bianconi 207c78c5a66SLorenzo Bianconi mediatek,infracfg: 208c78c5a66SLorenzo Bianconi $ref: /schemas/types.yaml#/definitions/phandle 209c78c5a66SLorenzo Bianconi description: 210c78c5a66SLorenzo Bianconi Phandle to the syscon node that handles the path from GMAC to 211c78c5a66SLorenzo Bianconi PHY variants. 212c78c5a66SLorenzo Bianconi 213c78c5a66SLorenzo Bianconi mediatek,sgmiisys: 214c78c5a66SLorenzo Bianconi minItems: 2 215c78c5a66SLorenzo Bianconi maxItems: 2 216c78c5a66SLorenzo Bianconi 21722ecfce1SLorenzo Bianconi mediatek,wed: false 21822ecfce1SLorenzo Bianconi 219e3ac1c27SDaniel Golle mediatek,wed-pcie: false 220e3ac1c27SDaniel Golle 221e3ac1c27SDaniel Golle - if: 222e3ac1c27SDaniel Golle properties: 223e3ac1c27SDaniel Golle compatible: 224e3ac1c27SDaniel Golle contains: 225e3ac1c27SDaniel Golle const: mediatek,mt7981-eth 226e3ac1c27SDaniel Golle then: 227e3ac1c27SDaniel Golle properties: 228e3ac1c27SDaniel Golle interrupts: 229e3ac1c27SDaniel Golle minItems: 4 230e3ac1c27SDaniel Golle 231e3ac1c27SDaniel Golle clocks: 232e3ac1c27SDaniel Golle minItems: 15 233e3ac1c27SDaniel Golle maxItems: 15 234e3ac1c27SDaniel Golle 235e3ac1c27SDaniel Golle clock-names: 236e3ac1c27SDaniel Golle items: 237e3ac1c27SDaniel Golle - const: fe 238e3ac1c27SDaniel Golle - const: gp2 239e3ac1c27SDaniel Golle - const: gp1 240e3ac1c27SDaniel Golle - const: wocpu0 241e3ac1c27SDaniel Golle - const: sgmii_ck 242e3ac1c27SDaniel Golle - const: sgmii_tx250m 243e3ac1c27SDaniel Golle - const: sgmii_rx250m 244e3ac1c27SDaniel Golle - const: sgmii_cdr_ref 245e3ac1c27SDaniel Golle - const: sgmii_cdr_fb 246e3ac1c27SDaniel Golle - const: sgmii2_tx250m 247e3ac1c27SDaniel Golle - const: sgmii2_rx250m 248e3ac1c27SDaniel Golle - const: sgmii2_cdr_ref 249e3ac1c27SDaniel Golle - const: sgmii2_cdr_fb 250e3ac1c27SDaniel Golle - const: netsys0 251e3ac1c27SDaniel Golle - const: netsys1 252e3ac1c27SDaniel Golle 253e3ac1c27SDaniel Golle mediatek,sgmiisys: 254e3ac1c27SDaniel Golle minItems: 2 255e3ac1c27SDaniel Golle maxItems: 2 256e3ac1c27SDaniel Golle 2574b139b75SLorenzo Bianconi - if: 2584b139b75SLorenzo Bianconi properties: 2594b139b75SLorenzo Bianconi compatible: 2604b139b75SLorenzo Bianconi contains: 2614b139b75SLorenzo Bianconi const: mediatek,mt7986-eth 2624b139b75SLorenzo Bianconi then: 2634b139b75SLorenzo Bianconi properties: 2644b139b75SLorenzo Bianconi interrupts: 2654b139b75SLorenzo Bianconi minItems: 4 2664b139b75SLorenzo Bianconi 2674b139b75SLorenzo Bianconi clocks: 2684b139b75SLorenzo Bianconi minItems: 15 2694b139b75SLorenzo Bianconi maxItems: 15 2704b139b75SLorenzo Bianconi 2714b139b75SLorenzo Bianconi clock-names: 2724b139b75SLorenzo Bianconi items: 2734b139b75SLorenzo Bianconi - const: fe 2744b139b75SLorenzo Bianconi - const: gp2 2754b139b75SLorenzo Bianconi - const: gp1 2764b139b75SLorenzo Bianconi - const: wocpu1 2774b139b75SLorenzo Bianconi - const: wocpu0 2784b139b75SLorenzo Bianconi - const: sgmii_tx250m 2794b139b75SLorenzo Bianconi - const: sgmii_rx250m 2804b139b75SLorenzo Bianconi - const: sgmii_cdr_ref 2814b139b75SLorenzo Bianconi - const: sgmii_cdr_fb 2824b139b75SLorenzo Bianconi - const: sgmii2_tx250m 2834b139b75SLorenzo Bianconi - const: sgmii2_rx250m 2844b139b75SLorenzo Bianconi - const: sgmii2_cdr_ref 2854b139b75SLorenzo Bianconi - const: sgmii2_cdr_fb 2864b139b75SLorenzo Bianconi - const: netsys0 2874b139b75SLorenzo Bianconi - const: netsys1 2884b139b75SLorenzo Bianconi 2894b139b75SLorenzo Bianconi mediatek,sgmiisys: 2904b139b75SLorenzo Bianconi minItems: 2 2914b139b75SLorenzo Bianconi maxItems: 2 2924b139b75SLorenzo Bianconi 293c78c5a66SLorenzo BianconipatternProperties: 294c78c5a66SLorenzo Bianconi "^mac@[0-1]$": 295c78c5a66SLorenzo Bianconi type: object 296c78c5a66SLorenzo Bianconi additionalProperties: false 297c78c5a66SLorenzo Bianconi allOf: 298c78c5a66SLorenzo Bianconi - $ref: ethernet-controller.yaml# 299c78c5a66SLorenzo Bianconi description: 300c78c5a66SLorenzo Bianconi Ethernet MAC node 301c78c5a66SLorenzo Bianconi properties: 302c78c5a66SLorenzo Bianconi compatible: 303c78c5a66SLorenzo Bianconi const: mediatek,eth-mac 304c78c5a66SLorenzo Bianconi 305c78c5a66SLorenzo Bianconi reg: 306c78c5a66SLorenzo Bianconi maxItems: 1 307c78c5a66SLorenzo Bianconi 308c78c5a66SLorenzo Bianconi phy-handle: true 309c78c5a66SLorenzo Bianconi 310c78c5a66SLorenzo Bianconi phy-mode: true 311c78c5a66SLorenzo Bianconi 312c78c5a66SLorenzo Bianconi required: 313c78c5a66SLorenzo Bianconi - reg 314c78c5a66SLorenzo Bianconi - compatible 315c78c5a66SLorenzo Bianconi - phy-handle 316c78c5a66SLorenzo Bianconi 317c78c5a66SLorenzo Bianconirequired: 318c78c5a66SLorenzo Bianconi - compatible 319c78c5a66SLorenzo Bianconi - reg 320c78c5a66SLorenzo Bianconi - interrupts 321c78c5a66SLorenzo Bianconi - clocks 322c78c5a66SLorenzo Bianconi - clock-names 323c78c5a66SLorenzo Bianconi - mediatek,ethsys 324c78c5a66SLorenzo Bianconi 325c78c5a66SLorenzo BianconiunevaluatedProperties: false 326c78c5a66SLorenzo Bianconi 327c78c5a66SLorenzo Bianconiexamples: 328c78c5a66SLorenzo Bianconi - | 329c78c5a66SLorenzo Bianconi #include <dt-bindings/interrupt-controller/arm-gic.h> 330c78c5a66SLorenzo Bianconi #include <dt-bindings/interrupt-controller/irq.h> 331c78c5a66SLorenzo Bianconi #include <dt-bindings/clock/mt7622-clk.h> 332c78c5a66SLorenzo Bianconi #include <dt-bindings/power/mt7622-power.h> 333c78c5a66SLorenzo Bianconi 334c78c5a66SLorenzo Bianconi soc { 335c78c5a66SLorenzo Bianconi #address-cells = <2>; 336c78c5a66SLorenzo Bianconi #size-cells = <2>; 337c78c5a66SLorenzo Bianconi 338c78c5a66SLorenzo Bianconi ethernet: ethernet@1b100000 { 339c78c5a66SLorenzo Bianconi compatible = "mediatek,mt7622-eth"; 340c78c5a66SLorenzo Bianconi reg = <0 0x1b100000 0 0x20000>; 341c78c5a66SLorenzo Bianconi interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_LOW>, 342c78c5a66SLorenzo Bianconi <GIC_SPI 224 IRQ_TYPE_LEVEL_LOW>, 343c78c5a66SLorenzo Bianconi <GIC_SPI 225 IRQ_TYPE_LEVEL_LOW>; 344c78c5a66SLorenzo Bianconi clocks = <&topckgen CLK_TOP_ETH_SEL>, 345c78c5a66SLorenzo Bianconi <ðsys CLK_ETH_ESW_EN>, 346c78c5a66SLorenzo Bianconi <ðsys CLK_ETH_GP0_EN>, 347c78c5a66SLorenzo Bianconi <ðsys CLK_ETH_GP1_EN>, 348c78c5a66SLorenzo Bianconi <ðsys CLK_ETH_GP2_EN>, 349c78c5a66SLorenzo Bianconi <&sgmiisys CLK_SGMII_TX250M_EN>, 350c78c5a66SLorenzo Bianconi <&sgmiisys CLK_SGMII_RX250M_EN>, 351c78c5a66SLorenzo Bianconi <&sgmiisys CLK_SGMII_CDR_REF>, 352c78c5a66SLorenzo Bianconi <&sgmiisys CLK_SGMII_CDR_FB>, 353c78c5a66SLorenzo Bianconi <&topckgen CLK_TOP_SGMIIPLL>, 354c78c5a66SLorenzo Bianconi <&apmixedsys CLK_APMIXED_ETH2PLL>; 355c78c5a66SLorenzo Bianconi clock-names = "ethif", "esw", "gp0", "gp1", "gp2", 356c78c5a66SLorenzo Bianconi "sgmii_tx250m", "sgmii_rx250m", 357c78c5a66SLorenzo Bianconi "sgmii_cdr_ref", "sgmii_cdr_fb", "sgmii_ck", 358c78c5a66SLorenzo Bianconi "eth2pll"; 359c78c5a66SLorenzo Bianconi power-domains = <&scpsys MT7622_POWER_DOMAIN_ETHSYS>; 360c78c5a66SLorenzo Bianconi mediatek,ethsys = <ðsys>; 361c78c5a66SLorenzo Bianconi mediatek,sgmiisys = <&sgmiisys>; 362c78c5a66SLorenzo Bianconi cci-control-port = <&cci_control2>; 363c78c5a66SLorenzo Bianconi mediatek,pcie-mirror = <&pcie_mirror>; 364c78c5a66SLorenzo Bianconi mediatek,hifsys = <&hifsys>; 365c78c5a66SLorenzo Bianconi dma-coherent; 366c78c5a66SLorenzo Bianconi 367c78c5a66SLorenzo Bianconi #address-cells = <1>; 368c78c5a66SLorenzo Bianconi #size-cells = <0>; 369c78c5a66SLorenzo Bianconi 370c78c5a66SLorenzo Bianconi mdio0: mdio-bus { 371c78c5a66SLorenzo Bianconi #address-cells = <1>; 372c78c5a66SLorenzo Bianconi #size-cells = <0>; 373c78c5a66SLorenzo Bianconi 374c78c5a66SLorenzo Bianconi phy0: ethernet-phy@0 { 375c78c5a66SLorenzo Bianconi reg = <0>; 376c78c5a66SLorenzo Bianconi }; 377c78c5a66SLorenzo Bianconi 378c78c5a66SLorenzo Bianconi phy1: ethernet-phy@1 { 379c78c5a66SLorenzo Bianconi reg = <1>; 380c78c5a66SLorenzo Bianconi }; 381c78c5a66SLorenzo Bianconi }; 382c78c5a66SLorenzo Bianconi 383c78c5a66SLorenzo Bianconi gmac0: mac@0 { 384c78c5a66SLorenzo Bianconi compatible = "mediatek,eth-mac"; 385c78c5a66SLorenzo Bianconi phy-mode = "rgmii"; 386c78c5a66SLorenzo Bianconi phy-handle = <&phy0>; 387c78c5a66SLorenzo Bianconi reg = <0>; 388c78c5a66SLorenzo Bianconi }; 389c78c5a66SLorenzo Bianconi 390c78c5a66SLorenzo Bianconi gmac1: mac@1 { 391c78c5a66SLorenzo Bianconi compatible = "mediatek,eth-mac"; 392c78c5a66SLorenzo Bianconi phy-mode = "rgmii"; 393c78c5a66SLorenzo Bianconi phy-handle = <&phy1>; 394c78c5a66SLorenzo Bianconi reg = <1>; 395c78c5a66SLorenzo Bianconi }; 396c78c5a66SLorenzo Bianconi }; 397c78c5a66SLorenzo Bianconi }; 3984b139b75SLorenzo Bianconi 3994b139b75SLorenzo Bianconi - | 4004b139b75SLorenzo Bianconi #include <dt-bindings/interrupt-controller/arm-gic.h> 4014b139b75SLorenzo Bianconi #include <dt-bindings/interrupt-controller/irq.h> 4024b139b75SLorenzo Bianconi #include <dt-bindings/clock/mt7622-clk.h> 4034b139b75SLorenzo Bianconi 4044b139b75SLorenzo Bianconi soc { 4054b139b75SLorenzo Bianconi #address-cells = <2>; 4064b139b75SLorenzo Bianconi #size-cells = <2>; 4074b139b75SLorenzo Bianconi 4084b139b75SLorenzo Bianconi eth: ethernet@15100000 { 4094b139b75SLorenzo Bianconi #define CLK_ETH_FE_EN 0 4104b139b75SLorenzo Bianconi #define CLK_ETH_WOCPU1_EN 3 4114b139b75SLorenzo Bianconi #define CLK_ETH_WOCPU0_EN 4 4124b139b75SLorenzo Bianconi #define CLK_TOP_NETSYS_SEL 43 4134b139b75SLorenzo Bianconi #define CLK_TOP_NETSYS_500M_SEL 44 4144b139b75SLorenzo Bianconi #define CLK_TOP_NETSYS_2X_SEL 46 4154b139b75SLorenzo Bianconi #define CLK_TOP_SGM_325M_SEL 47 4164b139b75SLorenzo Bianconi #define CLK_APMIXED_NET2PLL 1 4174b139b75SLorenzo Bianconi #define CLK_APMIXED_SGMPLL 3 4184b139b75SLorenzo Bianconi 4194b139b75SLorenzo Bianconi compatible = "mediatek,mt7986-eth"; 4204b139b75SLorenzo Bianconi reg = <0 0x15100000 0 0x80000>; 4214b139b75SLorenzo Bianconi interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 4224b139b75SLorenzo Bianconi <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, 4234b139b75SLorenzo Bianconi <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, 4244b139b75SLorenzo Bianconi <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; 4254b139b75SLorenzo Bianconi clocks = <ðsys CLK_ETH_FE_EN>, 4264b139b75SLorenzo Bianconi <ðsys CLK_ETH_GP2_EN>, 4274b139b75SLorenzo Bianconi <ðsys CLK_ETH_GP1_EN>, 4284b139b75SLorenzo Bianconi <ðsys CLK_ETH_WOCPU1_EN>, 4294b139b75SLorenzo Bianconi <ðsys CLK_ETH_WOCPU0_EN>, 4304b139b75SLorenzo Bianconi <&sgmiisys0 CLK_SGMII_TX250M_EN>, 4314b139b75SLorenzo Bianconi <&sgmiisys0 CLK_SGMII_RX250M_EN>, 4324b139b75SLorenzo Bianconi <&sgmiisys0 CLK_SGMII_CDR_REF>, 4334b139b75SLorenzo Bianconi <&sgmiisys0 CLK_SGMII_CDR_FB>, 4344b139b75SLorenzo Bianconi <&sgmiisys1 CLK_SGMII_TX250M_EN>, 4354b139b75SLorenzo Bianconi <&sgmiisys1 CLK_SGMII_RX250M_EN>, 4364b139b75SLorenzo Bianconi <&sgmiisys1 CLK_SGMII_CDR_REF>, 4374b139b75SLorenzo Bianconi <&sgmiisys1 CLK_SGMII_CDR_FB>, 4384b139b75SLorenzo Bianconi <&topckgen CLK_TOP_NETSYS_SEL>, 4394b139b75SLorenzo Bianconi <&topckgen CLK_TOP_NETSYS_SEL>; 4404b139b75SLorenzo Bianconi clock-names = "fe", "gp2", "gp1", "wocpu1", "wocpu0", 4414b139b75SLorenzo Bianconi "sgmii_tx250m", "sgmii_rx250m", 4424b139b75SLorenzo Bianconi "sgmii_cdr_ref", "sgmii_cdr_fb", 4434b139b75SLorenzo Bianconi "sgmii2_tx250m", "sgmii2_rx250m", 4444b139b75SLorenzo Bianconi "sgmii2_cdr_ref", "sgmii2_cdr_fb", 4454b139b75SLorenzo Bianconi "netsys0", "netsys1"; 4464b139b75SLorenzo Bianconi mediatek,ethsys = <ðsys>; 4474b139b75SLorenzo Bianconi mediatek,sgmiisys = <&sgmiisys0>, <&sgmiisys1>; 4484b139b75SLorenzo Bianconi assigned-clocks = <&topckgen CLK_TOP_NETSYS_2X_SEL>, 4494b139b75SLorenzo Bianconi <&topckgen CLK_TOP_SGM_325M_SEL>; 4504b139b75SLorenzo Bianconi assigned-clock-parents = <&apmixedsys CLK_APMIXED_NET2PLL>, 4514b139b75SLorenzo Bianconi <&apmixedsys CLK_APMIXED_SGMPLL>; 4524b139b75SLorenzo Bianconi 4534b139b75SLorenzo Bianconi #address-cells = <1>; 4544b139b75SLorenzo Bianconi #size-cells = <0>; 4554b139b75SLorenzo Bianconi 4564b139b75SLorenzo Bianconi mdio: mdio-bus { 4574b139b75SLorenzo Bianconi #address-cells = <1>; 4584b139b75SLorenzo Bianconi #size-cells = <0>; 4594b139b75SLorenzo Bianconi 4604b139b75SLorenzo Bianconi phy5: ethernet-phy@0 { 4614b139b75SLorenzo Bianconi compatible = "ethernet-phy-id67c9.de0a"; 4624b139b75SLorenzo Bianconi phy-mode = "2500base-x"; 4634b139b75SLorenzo Bianconi reset-gpios = <&pio 6 1>; 4644b139b75SLorenzo Bianconi reset-deassert-us = <20000>; 4654b139b75SLorenzo Bianconi reg = <5>; 4664b139b75SLorenzo Bianconi }; 4674b139b75SLorenzo Bianconi 4684b139b75SLorenzo Bianconi phy6: ethernet-phy@1 { 4694b139b75SLorenzo Bianconi compatible = "ethernet-phy-id67c9.de0a"; 4704b139b75SLorenzo Bianconi phy-mode = "2500base-x"; 4714b139b75SLorenzo Bianconi reg = <6>; 4724b139b75SLorenzo Bianconi }; 4734b139b75SLorenzo Bianconi }; 4744b139b75SLorenzo Bianconi 4754b139b75SLorenzo Bianconi mac0: mac@0 { 4764b139b75SLorenzo Bianconi compatible = "mediatek,eth-mac"; 4774b139b75SLorenzo Bianconi phy-mode = "2500base-x"; 4784b139b75SLorenzo Bianconi phy-handle = <&phy5>; 4794b139b75SLorenzo Bianconi reg = <0>; 4804b139b75SLorenzo Bianconi }; 4814b139b75SLorenzo Bianconi 4824b139b75SLorenzo Bianconi mac1: mac@1 { 4834b139b75SLorenzo Bianconi compatible = "mediatek,eth-mac"; 4844b139b75SLorenzo Bianconi phy-mode = "2500base-x"; 4854b139b75SLorenzo Bianconi phy-handle = <&phy6>; 4864b139b75SLorenzo Bianconi reg = <1>; 4874b139b75SLorenzo Bianconi }; 4884b139b75SLorenzo Bianconi }; 4894b139b75SLorenzo Bianconi }; 490