1c78c5a66SLorenzo Bianconi# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2c78c5a66SLorenzo Bianconi%YAML 1.2 3c78c5a66SLorenzo Bianconi--- 4c78c5a66SLorenzo Bianconi$id: http://devicetree.org/schemas/net/mediatek,net.yaml# 5c78c5a66SLorenzo Bianconi$schema: http://devicetree.org/meta-schemas/core.yaml# 6c78c5a66SLorenzo Bianconi 7c78c5a66SLorenzo Bianconititle: MediaTek Frame Engine Ethernet controller 8c78c5a66SLorenzo Bianconi 9c78c5a66SLorenzo Bianconimaintainers: 10c78c5a66SLorenzo Bianconi - Lorenzo Bianconi <lorenzo@kernel.org> 11c78c5a66SLorenzo Bianconi - Felix Fietkau <nbd@nbd.name> 12c78c5a66SLorenzo Bianconi 13c78c5a66SLorenzo Bianconidescription: 14c78c5a66SLorenzo Bianconi The frame engine ethernet controller can be found on MediaTek SoCs. These SoCs 15c78c5a66SLorenzo Bianconi have dual GMAC ports. 16c78c5a66SLorenzo Bianconi 17c78c5a66SLorenzo Bianconiproperties: 18c78c5a66SLorenzo Bianconi compatible: 19c78c5a66SLorenzo Bianconi enum: 20c78c5a66SLorenzo Bianconi - mediatek,mt2701-eth 21c78c5a66SLorenzo Bianconi - mediatek,mt7623-eth 22c78c5a66SLorenzo Bianconi - mediatek,mt7622-eth 23c78c5a66SLorenzo Bianconi - mediatek,mt7629-eth 244b139b75SLorenzo Bianconi - mediatek,mt7986-eth 25c78c5a66SLorenzo Bianconi - ralink,rt5350-eth 26c78c5a66SLorenzo Bianconi 27c78c5a66SLorenzo Bianconi reg: 28c78c5a66SLorenzo Bianconi maxItems: 1 29c78c5a66SLorenzo Bianconi 30*0a1e19c8SRob Herring clocks: true 31*0a1e19c8SRob Herring clock-names: true 32*0a1e19c8SRob Herring 33c78c5a66SLorenzo Bianconi interrupts: 34c78c5a66SLorenzo Bianconi minItems: 3 354b139b75SLorenzo Bianconi maxItems: 4 36c78c5a66SLorenzo Bianconi 37c78c5a66SLorenzo Bianconi power-domains: 38c78c5a66SLorenzo Bianconi maxItems: 1 39c78c5a66SLorenzo Bianconi 40c78c5a66SLorenzo Bianconi resets: 41c78c5a66SLorenzo Bianconi maxItems: 3 42c78c5a66SLorenzo Bianconi 43c78c5a66SLorenzo Bianconi reset-names: 44c78c5a66SLorenzo Bianconi items: 45c78c5a66SLorenzo Bianconi - const: fe 46c78c5a66SLorenzo Bianconi - const: gmac 47c78c5a66SLorenzo Bianconi - const: ppe 48c78c5a66SLorenzo Bianconi 49c78c5a66SLorenzo Bianconi mediatek,ethsys: 50c78c5a66SLorenzo Bianconi $ref: /schemas/types.yaml#/definitions/phandle 51c78c5a66SLorenzo Bianconi description: 52c78c5a66SLorenzo Bianconi Phandle to the syscon node that handles the port setup. 53c78c5a66SLorenzo Bianconi 54c78c5a66SLorenzo Bianconi cci-control-port: true 55c78c5a66SLorenzo Bianconi 56c78c5a66SLorenzo Bianconi mediatek,hifsys: 57c78c5a66SLorenzo Bianconi $ref: /schemas/types.yaml#/definitions/phandle 58c78c5a66SLorenzo Bianconi description: 59c78c5a66SLorenzo Bianconi Phandle to the mediatek hifsys controller used to provide various clocks 60c78c5a66SLorenzo Bianconi and reset to the system. 61c78c5a66SLorenzo Bianconi 62c78c5a66SLorenzo Bianconi mediatek,sgmiisys: 63c78c5a66SLorenzo Bianconi $ref: /schemas/types.yaml#/definitions/phandle-array 64c78c5a66SLorenzo Bianconi minItems: 1 65c78c5a66SLorenzo Bianconi maxItems: 2 66c78c5a66SLorenzo Bianconi items: 67c78c5a66SLorenzo Bianconi maxItems: 1 68c78c5a66SLorenzo Bianconi description: 69c78c5a66SLorenzo Bianconi A list of phandle to the syscon node that handles the SGMII setup which is required for 70c78c5a66SLorenzo Bianconi those SoCs equipped with SGMII. 71c78c5a66SLorenzo Bianconi 72c78c5a66SLorenzo Bianconi dma-coherent: true 73c78c5a66SLorenzo Bianconi 74c78c5a66SLorenzo Bianconi mdio-bus: 75c78c5a66SLorenzo Bianconi $ref: mdio.yaml# 76c78c5a66SLorenzo Bianconi unevaluatedProperties: false 77c78c5a66SLorenzo Bianconi 78c78c5a66SLorenzo Bianconi "#address-cells": 79c78c5a66SLorenzo Bianconi const: 1 80c78c5a66SLorenzo Bianconi 81c78c5a66SLorenzo Bianconi "#size-cells": 82c78c5a66SLorenzo Bianconi const: 0 83c78c5a66SLorenzo Bianconi 84c78c5a66SLorenzo BianconiallOf: 85c78c5a66SLorenzo Bianconi - $ref: "ethernet-controller.yaml#" 86c78c5a66SLorenzo Bianconi - if: 87c78c5a66SLorenzo Bianconi properties: 88c78c5a66SLorenzo Bianconi compatible: 89c78c5a66SLorenzo Bianconi contains: 90c78c5a66SLorenzo Bianconi enum: 91c78c5a66SLorenzo Bianconi - mediatek,mt2701-eth 92c78c5a66SLorenzo Bianconi - mediatek,mt7623-eth 93c78c5a66SLorenzo Bianconi then: 94c78c5a66SLorenzo Bianconi properties: 954b139b75SLorenzo Bianconi interrupts: 964b139b75SLorenzo Bianconi maxItems: 3 974b139b75SLorenzo Bianconi 98c78c5a66SLorenzo Bianconi clocks: 99c78c5a66SLorenzo Bianconi minItems: 4 100c78c5a66SLorenzo Bianconi maxItems: 4 101c78c5a66SLorenzo Bianconi 102c78c5a66SLorenzo Bianconi clock-names: 103c78c5a66SLorenzo Bianconi items: 104c78c5a66SLorenzo Bianconi - const: ethif 105c78c5a66SLorenzo Bianconi - const: esw 106c78c5a66SLorenzo Bianconi - const: gp1 107c78c5a66SLorenzo Bianconi - const: gp2 108c78c5a66SLorenzo Bianconi 109c78c5a66SLorenzo Bianconi mediatek,pctl: 110c78c5a66SLorenzo Bianconi $ref: /schemas/types.yaml#/definitions/phandle 111c78c5a66SLorenzo Bianconi description: 112c78c5a66SLorenzo Bianconi Phandle to the syscon node that handles the ports slew rate and 113c78c5a66SLorenzo Bianconi driver current. 114c78c5a66SLorenzo Bianconi 115c78c5a66SLorenzo Bianconi - if: 116c78c5a66SLorenzo Bianconi properties: 117c78c5a66SLorenzo Bianconi compatible: 118c78c5a66SLorenzo Bianconi contains: 119c78c5a66SLorenzo Bianconi const: mediatek,mt7622-eth 120c78c5a66SLorenzo Bianconi then: 121c78c5a66SLorenzo Bianconi properties: 1224b139b75SLorenzo Bianconi interrupts: 1234b139b75SLorenzo Bianconi maxItems: 3 1244b139b75SLorenzo Bianconi 125c78c5a66SLorenzo Bianconi clocks: 126c78c5a66SLorenzo Bianconi minItems: 11 127c78c5a66SLorenzo Bianconi maxItems: 11 128c78c5a66SLorenzo Bianconi 129c78c5a66SLorenzo Bianconi clock-names: 130c78c5a66SLorenzo Bianconi items: 131c78c5a66SLorenzo Bianconi - const: ethif 132c78c5a66SLorenzo Bianconi - const: esw 133c78c5a66SLorenzo Bianconi - const: gp0 134c78c5a66SLorenzo Bianconi - const: gp1 135c78c5a66SLorenzo Bianconi - const: gp2 136c78c5a66SLorenzo Bianconi - const: sgmii_tx250m 137c78c5a66SLorenzo Bianconi - const: sgmii_rx250m 138c78c5a66SLorenzo Bianconi - const: sgmii_cdr_ref 139c78c5a66SLorenzo Bianconi - const: sgmii_cdr_fb 140c78c5a66SLorenzo Bianconi - const: sgmii_ck 141c78c5a66SLorenzo Bianconi - const: eth2pll 142c78c5a66SLorenzo Bianconi 143c78c5a66SLorenzo Bianconi mediatek,sgmiisys: 144c78c5a66SLorenzo Bianconi minItems: 1 145c78c5a66SLorenzo Bianconi maxItems: 1 146c78c5a66SLorenzo Bianconi 147c78c5a66SLorenzo Bianconi mediatek,wed: 148c78c5a66SLorenzo Bianconi $ref: /schemas/types.yaml#/definitions/phandle-array 149c78c5a66SLorenzo Bianconi minItems: 2 150c78c5a66SLorenzo Bianconi maxItems: 2 151c78c5a66SLorenzo Bianconi items: 152c78c5a66SLorenzo Bianconi maxItems: 1 153c78c5a66SLorenzo Bianconi description: 154c78c5a66SLorenzo Bianconi List of phandles to wireless ethernet dispatch nodes. 155c78c5a66SLorenzo Bianconi 156c78c5a66SLorenzo Bianconi mediatek,pcie-mirror: 157c78c5a66SLorenzo Bianconi $ref: /schemas/types.yaml#/definitions/phandle 158c78c5a66SLorenzo Bianconi description: 159c78c5a66SLorenzo Bianconi Phandle to the mediatek pcie-mirror controller. 160c78c5a66SLorenzo Bianconi 161c78c5a66SLorenzo Bianconi - if: 162c78c5a66SLorenzo Bianconi properties: 163c78c5a66SLorenzo Bianconi compatible: 164c78c5a66SLorenzo Bianconi contains: 165c78c5a66SLorenzo Bianconi const: mediatek,mt7629-eth 166c78c5a66SLorenzo Bianconi then: 167c78c5a66SLorenzo Bianconi properties: 1684b139b75SLorenzo Bianconi interrupts: 1694b139b75SLorenzo Bianconi maxItems: 3 1704b139b75SLorenzo Bianconi 171c78c5a66SLorenzo Bianconi clocks: 172c78c5a66SLorenzo Bianconi minItems: 17 173c78c5a66SLorenzo Bianconi maxItems: 17 174c78c5a66SLorenzo Bianconi 175c78c5a66SLorenzo Bianconi clock-names: 176c78c5a66SLorenzo Bianconi items: 177c78c5a66SLorenzo Bianconi - const: ethif 178c78c5a66SLorenzo Bianconi - const: sgmiitop 179c78c5a66SLorenzo Bianconi - const: esw 180c78c5a66SLorenzo Bianconi - const: gp0 181c78c5a66SLorenzo Bianconi - const: gp1 182c78c5a66SLorenzo Bianconi - const: gp2 183c78c5a66SLorenzo Bianconi - const: fe 184c78c5a66SLorenzo Bianconi - const: sgmii_tx250m 185c78c5a66SLorenzo Bianconi - const: sgmii_rx250m 186c78c5a66SLorenzo Bianconi - const: sgmii_cdr_ref 187c78c5a66SLorenzo Bianconi - const: sgmii_cdr_fb 188c78c5a66SLorenzo Bianconi - const: sgmii2_tx250m 189c78c5a66SLorenzo Bianconi - const: sgmii2_rx250m 190c78c5a66SLorenzo Bianconi - const: sgmii2_cdr_ref 191c78c5a66SLorenzo Bianconi - const: sgmii2_cdr_fb 192c78c5a66SLorenzo Bianconi - const: sgmii_ck 193c78c5a66SLorenzo Bianconi - const: eth2pll 194c78c5a66SLorenzo Bianconi 195c78c5a66SLorenzo Bianconi mediatek,infracfg: 196c78c5a66SLorenzo Bianconi $ref: /schemas/types.yaml#/definitions/phandle 197c78c5a66SLorenzo Bianconi description: 198c78c5a66SLorenzo Bianconi Phandle to the syscon node that handles the path from GMAC to 199c78c5a66SLorenzo Bianconi PHY variants. 200c78c5a66SLorenzo Bianconi 201c78c5a66SLorenzo Bianconi mediatek,sgmiisys: 202c78c5a66SLorenzo Bianconi minItems: 2 203c78c5a66SLorenzo Bianconi maxItems: 2 204c78c5a66SLorenzo Bianconi 2054b139b75SLorenzo Bianconi - if: 2064b139b75SLorenzo Bianconi properties: 2074b139b75SLorenzo Bianconi compatible: 2084b139b75SLorenzo Bianconi contains: 2094b139b75SLorenzo Bianconi const: mediatek,mt7986-eth 2104b139b75SLorenzo Bianconi then: 2114b139b75SLorenzo Bianconi properties: 2124b139b75SLorenzo Bianconi interrupts: 2134b139b75SLorenzo Bianconi minItems: 4 2144b139b75SLorenzo Bianconi 2154b139b75SLorenzo Bianconi clocks: 2164b139b75SLorenzo Bianconi minItems: 15 2174b139b75SLorenzo Bianconi maxItems: 15 2184b139b75SLorenzo Bianconi 2194b139b75SLorenzo Bianconi clock-names: 2204b139b75SLorenzo Bianconi items: 2214b139b75SLorenzo Bianconi - const: fe 2224b139b75SLorenzo Bianconi - const: gp2 2234b139b75SLorenzo Bianconi - const: gp1 2244b139b75SLorenzo Bianconi - const: wocpu1 2254b139b75SLorenzo Bianconi - const: wocpu0 2264b139b75SLorenzo Bianconi - const: sgmii_tx250m 2274b139b75SLorenzo Bianconi - const: sgmii_rx250m 2284b139b75SLorenzo Bianconi - const: sgmii_cdr_ref 2294b139b75SLorenzo Bianconi - const: sgmii_cdr_fb 2304b139b75SLorenzo Bianconi - const: sgmii2_tx250m 2314b139b75SLorenzo Bianconi - const: sgmii2_rx250m 2324b139b75SLorenzo Bianconi - const: sgmii2_cdr_ref 2334b139b75SLorenzo Bianconi - const: sgmii2_cdr_fb 2344b139b75SLorenzo Bianconi - const: netsys0 2354b139b75SLorenzo Bianconi - const: netsys1 2364b139b75SLorenzo Bianconi 2374b139b75SLorenzo Bianconi mediatek,sgmiisys: 2384b139b75SLorenzo Bianconi minItems: 2 2394b139b75SLorenzo Bianconi maxItems: 2 2404b139b75SLorenzo Bianconi 241c78c5a66SLorenzo BianconipatternProperties: 242c78c5a66SLorenzo Bianconi "^mac@[0-1]$": 243c78c5a66SLorenzo Bianconi type: object 244c78c5a66SLorenzo Bianconi additionalProperties: false 245c78c5a66SLorenzo Bianconi allOf: 246c78c5a66SLorenzo Bianconi - $ref: ethernet-controller.yaml# 247c78c5a66SLorenzo Bianconi description: 248c78c5a66SLorenzo Bianconi Ethernet MAC node 249c78c5a66SLorenzo Bianconi properties: 250c78c5a66SLorenzo Bianconi compatible: 251c78c5a66SLorenzo Bianconi const: mediatek,eth-mac 252c78c5a66SLorenzo Bianconi 253c78c5a66SLorenzo Bianconi reg: 254c78c5a66SLorenzo Bianconi maxItems: 1 255c78c5a66SLorenzo Bianconi 256c78c5a66SLorenzo Bianconi phy-handle: true 257c78c5a66SLorenzo Bianconi 258c78c5a66SLorenzo Bianconi phy-mode: true 259c78c5a66SLorenzo Bianconi 260c78c5a66SLorenzo Bianconi required: 261c78c5a66SLorenzo Bianconi - reg 262c78c5a66SLorenzo Bianconi - compatible 263c78c5a66SLorenzo Bianconi - phy-handle 264c78c5a66SLorenzo Bianconi 265c78c5a66SLorenzo Bianconirequired: 266c78c5a66SLorenzo Bianconi - compatible 267c78c5a66SLorenzo Bianconi - reg 268c78c5a66SLorenzo Bianconi - interrupts 269c78c5a66SLorenzo Bianconi - clocks 270c78c5a66SLorenzo Bianconi - clock-names 271c78c5a66SLorenzo Bianconi - mediatek,ethsys 272c78c5a66SLorenzo Bianconi 273c78c5a66SLorenzo BianconiunevaluatedProperties: false 274c78c5a66SLorenzo Bianconi 275c78c5a66SLorenzo Bianconiexamples: 276c78c5a66SLorenzo Bianconi - | 277c78c5a66SLorenzo Bianconi #include <dt-bindings/interrupt-controller/arm-gic.h> 278c78c5a66SLorenzo Bianconi #include <dt-bindings/interrupt-controller/irq.h> 279c78c5a66SLorenzo Bianconi #include <dt-bindings/clock/mt7622-clk.h> 280c78c5a66SLorenzo Bianconi #include <dt-bindings/power/mt7622-power.h> 281c78c5a66SLorenzo Bianconi 282c78c5a66SLorenzo Bianconi soc { 283c78c5a66SLorenzo Bianconi #address-cells = <2>; 284c78c5a66SLorenzo Bianconi #size-cells = <2>; 285c78c5a66SLorenzo Bianconi 286c78c5a66SLorenzo Bianconi ethernet: ethernet@1b100000 { 287c78c5a66SLorenzo Bianconi compatible = "mediatek,mt7622-eth"; 288c78c5a66SLorenzo Bianconi reg = <0 0x1b100000 0 0x20000>; 289c78c5a66SLorenzo Bianconi interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_LOW>, 290c78c5a66SLorenzo Bianconi <GIC_SPI 224 IRQ_TYPE_LEVEL_LOW>, 291c78c5a66SLorenzo Bianconi <GIC_SPI 225 IRQ_TYPE_LEVEL_LOW>; 292c78c5a66SLorenzo Bianconi clocks = <&topckgen CLK_TOP_ETH_SEL>, 293c78c5a66SLorenzo Bianconi <ðsys CLK_ETH_ESW_EN>, 294c78c5a66SLorenzo Bianconi <ðsys CLK_ETH_GP0_EN>, 295c78c5a66SLorenzo Bianconi <ðsys CLK_ETH_GP1_EN>, 296c78c5a66SLorenzo Bianconi <ðsys CLK_ETH_GP2_EN>, 297c78c5a66SLorenzo Bianconi <&sgmiisys CLK_SGMII_TX250M_EN>, 298c78c5a66SLorenzo Bianconi <&sgmiisys CLK_SGMII_RX250M_EN>, 299c78c5a66SLorenzo Bianconi <&sgmiisys CLK_SGMII_CDR_REF>, 300c78c5a66SLorenzo Bianconi <&sgmiisys CLK_SGMII_CDR_FB>, 301c78c5a66SLorenzo Bianconi <&topckgen CLK_TOP_SGMIIPLL>, 302c78c5a66SLorenzo Bianconi <&apmixedsys CLK_APMIXED_ETH2PLL>; 303c78c5a66SLorenzo Bianconi clock-names = "ethif", "esw", "gp0", "gp1", "gp2", 304c78c5a66SLorenzo Bianconi "sgmii_tx250m", "sgmii_rx250m", 305c78c5a66SLorenzo Bianconi "sgmii_cdr_ref", "sgmii_cdr_fb", "sgmii_ck", 306c78c5a66SLorenzo Bianconi "eth2pll"; 307c78c5a66SLorenzo Bianconi power-domains = <&scpsys MT7622_POWER_DOMAIN_ETHSYS>; 308c78c5a66SLorenzo Bianconi mediatek,ethsys = <ðsys>; 309c78c5a66SLorenzo Bianconi mediatek,sgmiisys = <&sgmiisys>; 310c78c5a66SLorenzo Bianconi cci-control-port = <&cci_control2>; 311c78c5a66SLorenzo Bianconi mediatek,pcie-mirror = <&pcie_mirror>; 312c78c5a66SLorenzo Bianconi mediatek,hifsys = <&hifsys>; 313c78c5a66SLorenzo Bianconi dma-coherent; 314c78c5a66SLorenzo Bianconi 315c78c5a66SLorenzo Bianconi #address-cells = <1>; 316c78c5a66SLorenzo Bianconi #size-cells = <0>; 317c78c5a66SLorenzo Bianconi 318c78c5a66SLorenzo Bianconi mdio0: mdio-bus { 319c78c5a66SLorenzo Bianconi #address-cells = <1>; 320c78c5a66SLorenzo Bianconi #size-cells = <0>; 321c78c5a66SLorenzo Bianconi 322c78c5a66SLorenzo Bianconi phy0: ethernet-phy@0 { 323c78c5a66SLorenzo Bianconi reg = <0>; 324c78c5a66SLorenzo Bianconi }; 325c78c5a66SLorenzo Bianconi 326c78c5a66SLorenzo Bianconi phy1: ethernet-phy@1 { 327c78c5a66SLorenzo Bianconi reg = <1>; 328c78c5a66SLorenzo Bianconi }; 329c78c5a66SLorenzo Bianconi }; 330c78c5a66SLorenzo Bianconi 331c78c5a66SLorenzo Bianconi gmac0: mac@0 { 332c78c5a66SLorenzo Bianconi compatible = "mediatek,eth-mac"; 333c78c5a66SLorenzo Bianconi phy-mode = "rgmii"; 334c78c5a66SLorenzo Bianconi phy-handle = <&phy0>; 335c78c5a66SLorenzo Bianconi reg = <0>; 336c78c5a66SLorenzo Bianconi }; 337c78c5a66SLorenzo Bianconi 338c78c5a66SLorenzo Bianconi gmac1: mac@1 { 339c78c5a66SLorenzo Bianconi compatible = "mediatek,eth-mac"; 340c78c5a66SLorenzo Bianconi phy-mode = "rgmii"; 341c78c5a66SLorenzo Bianconi phy-handle = <&phy1>; 342c78c5a66SLorenzo Bianconi reg = <1>; 343c78c5a66SLorenzo Bianconi }; 344c78c5a66SLorenzo Bianconi }; 345c78c5a66SLorenzo Bianconi }; 3464b139b75SLorenzo Bianconi 3474b139b75SLorenzo Bianconi - | 3484b139b75SLorenzo Bianconi #include <dt-bindings/interrupt-controller/arm-gic.h> 3494b139b75SLorenzo Bianconi #include <dt-bindings/interrupt-controller/irq.h> 3504b139b75SLorenzo Bianconi #include <dt-bindings/clock/mt7622-clk.h> 3514b139b75SLorenzo Bianconi 3524b139b75SLorenzo Bianconi soc { 3534b139b75SLorenzo Bianconi #address-cells = <2>; 3544b139b75SLorenzo Bianconi #size-cells = <2>; 3554b139b75SLorenzo Bianconi 3564b139b75SLorenzo Bianconi eth: ethernet@15100000 { 3574b139b75SLorenzo Bianconi #define CLK_ETH_FE_EN 0 3584b139b75SLorenzo Bianconi #define CLK_ETH_WOCPU1_EN 3 3594b139b75SLorenzo Bianconi #define CLK_ETH_WOCPU0_EN 4 3604b139b75SLorenzo Bianconi #define CLK_TOP_NETSYS_SEL 43 3614b139b75SLorenzo Bianconi #define CLK_TOP_NETSYS_500M_SEL 44 3624b139b75SLorenzo Bianconi #define CLK_TOP_NETSYS_2X_SEL 46 3634b139b75SLorenzo Bianconi #define CLK_TOP_SGM_325M_SEL 47 3644b139b75SLorenzo Bianconi #define CLK_APMIXED_NET2PLL 1 3654b139b75SLorenzo Bianconi #define CLK_APMIXED_SGMPLL 3 3664b139b75SLorenzo Bianconi 3674b139b75SLorenzo Bianconi compatible = "mediatek,mt7986-eth"; 3684b139b75SLorenzo Bianconi reg = <0 0x15100000 0 0x80000>; 3694b139b75SLorenzo Bianconi interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 3704b139b75SLorenzo Bianconi <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, 3714b139b75SLorenzo Bianconi <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, 3724b139b75SLorenzo Bianconi <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; 3734b139b75SLorenzo Bianconi clocks = <ðsys CLK_ETH_FE_EN>, 3744b139b75SLorenzo Bianconi <ðsys CLK_ETH_GP2_EN>, 3754b139b75SLorenzo Bianconi <ðsys CLK_ETH_GP1_EN>, 3764b139b75SLorenzo Bianconi <ðsys CLK_ETH_WOCPU1_EN>, 3774b139b75SLorenzo Bianconi <ðsys CLK_ETH_WOCPU0_EN>, 3784b139b75SLorenzo Bianconi <&sgmiisys0 CLK_SGMII_TX250M_EN>, 3794b139b75SLorenzo Bianconi <&sgmiisys0 CLK_SGMII_RX250M_EN>, 3804b139b75SLorenzo Bianconi <&sgmiisys0 CLK_SGMII_CDR_REF>, 3814b139b75SLorenzo Bianconi <&sgmiisys0 CLK_SGMII_CDR_FB>, 3824b139b75SLorenzo Bianconi <&sgmiisys1 CLK_SGMII_TX250M_EN>, 3834b139b75SLorenzo Bianconi <&sgmiisys1 CLK_SGMII_RX250M_EN>, 3844b139b75SLorenzo Bianconi <&sgmiisys1 CLK_SGMII_CDR_REF>, 3854b139b75SLorenzo Bianconi <&sgmiisys1 CLK_SGMII_CDR_FB>, 3864b139b75SLorenzo Bianconi <&topckgen CLK_TOP_NETSYS_SEL>, 3874b139b75SLorenzo Bianconi <&topckgen CLK_TOP_NETSYS_SEL>; 3884b139b75SLorenzo Bianconi clock-names = "fe", "gp2", "gp1", "wocpu1", "wocpu0", 3894b139b75SLorenzo Bianconi "sgmii_tx250m", "sgmii_rx250m", 3904b139b75SLorenzo Bianconi "sgmii_cdr_ref", "sgmii_cdr_fb", 3914b139b75SLorenzo Bianconi "sgmii2_tx250m", "sgmii2_rx250m", 3924b139b75SLorenzo Bianconi "sgmii2_cdr_ref", "sgmii2_cdr_fb", 3934b139b75SLorenzo Bianconi "netsys0", "netsys1"; 3944b139b75SLorenzo Bianconi mediatek,ethsys = <ðsys>; 3954b139b75SLorenzo Bianconi mediatek,sgmiisys = <&sgmiisys0>, <&sgmiisys1>; 3964b139b75SLorenzo Bianconi assigned-clocks = <&topckgen CLK_TOP_NETSYS_2X_SEL>, 3974b139b75SLorenzo Bianconi <&topckgen CLK_TOP_SGM_325M_SEL>; 3984b139b75SLorenzo Bianconi assigned-clock-parents = <&apmixedsys CLK_APMIXED_NET2PLL>, 3994b139b75SLorenzo Bianconi <&apmixedsys CLK_APMIXED_SGMPLL>; 4004b139b75SLorenzo Bianconi 4014b139b75SLorenzo Bianconi #address-cells = <1>; 4024b139b75SLorenzo Bianconi #size-cells = <0>; 4034b139b75SLorenzo Bianconi 4044b139b75SLorenzo Bianconi mdio: mdio-bus { 4054b139b75SLorenzo Bianconi #address-cells = <1>; 4064b139b75SLorenzo Bianconi #size-cells = <0>; 4074b139b75SLorenzo Bianconi 4084b139b75SLorenzo Bianconi phy5: ethernet-phy@0 { 4094b139b75SLorenzo Bianconi compatible = "ethernet-phy-id67c9.de0a"; 4104b139b75SLorenzo Bianconi phy-mode = "2500base-x"; 4114b139b75SLorenzo Bianconi reset-gpios = <&pio 6 1>; 4124b139b75SLorenzo Bianconi reset-deassert-us = <20000>; 4134b139b75SLorenzo Bianconi reg = <5>; 4144b139b75SLorenzo Bianconi }; 4154b139b75SLorenzo Bianconi 4164b139b75SLorenzo Bianconi phy6: ethernet-phy@1 { 4174b139b75SLorenzo Bianconi compatible = "ethernet-phy-id67c9.de0a"; 4184b139b75SLorenzo Bianconi phy-mode = "2500base-x"; 4194b139b75SLorenzo Bianconi reg = <6>; 4204b139b75SLorenzo Bianconi }; 4214b139b75SLorenzo Bianconi }; 4224b139b75SLorenzo Bianconi 4234b139b75SLorenzo Bianconi mac0: mac@0 { 4244b139b75SLorenzo Bianconi compatible = "mediatek,eth-mac"; 4254b139b75SLorenzo Bianconi phy-mode = "2500base-x"; 4264b139b75SLorenzo Bianconi phy-handle = <&phy5>; 4274b139b75SLorenzo Bianconi reg = <0>; 4284b139b75SLorenzo Bianconi }; 4294b139b75SLorenzo Bianconi 4304b139b75SLorenzo Bianconi mac1: mac@1 { 4314b139b75SLorenzo Bianconi compatible = "mediatek,eth-mac"; 4324b139b75SLorenzo Bianconi phy-mode = "2500base-x"; 4334b139b75SLorenzo Bianconi phy-handle = <&phy6>; 4344b139b75SLorenzo Bianconi reg = <1>; 4354b139b75SLorenzo Bianconi }; 4364b139b75SLorenzo Bianconi }; 4374b139b75SLorenzo Bianconi }; 438