1*652f2efaSRob Herring# SPDX-License-Identifier: GPL-2.0 2*652f2efaSRob Herring%YAML 1.2 3*652f2efaSRob Herring--- 4*652f2efaSRob Herring$id: http://devicetree.org/schemas/net/mdio-mux.yaml# 5*652f2efaSRob Herring$schema: http://devicetree.org/meta-schemas/core.yaml# 6*652f2efaSRob Herring 7*652f2efaSRob Herringtitle: Common MDIO bus multiplexer/switch properties. 8*652f2efaSRob Herring 9*652f2efaSRob Herringmaintainers: 10*652f2efaSRob Herring - Andrew Lunn <andrew@lunn.ch> 11*652f2efaSRob Herring 12*652f2efaSRob Herringdescription: |+ 13*652f2efaSRob Herring An MDIO bus multiplexer/switch will have several child busses that are 14*652f2efaSRob Herring numbered uniquely in a device dependent manner. The nodes for an MDIO 15*652f2efaSRob Herring bus multiplexer/switch will have one child node for each child bus. 16*652f2efaSRob Herring 17*652f2efaSRob Herringproperties: 18*652f2efaSRob Herring $nodename: 19*652f2efaSRob Herring pattern: '^mdio-mux[\-@]?' 20*652f2efaSRob Herring 21*652f2efaSRob Herring mdio-parent-bus: 22*652f2efaSRob Herring $ref: /schemas/types.yaml#/definitions/phandle 23*652f2efaSRob Herring description: 24*652f2efaSRob Herring The phandle of the MDIO bus that this multiplexer's master-side port is 25*652f2efaSRob Herring connected to. 26*652f2efaSRob Herring 27*652f2efaSRob Herring '#address-cells': 28*652f2efaSRob Herring const: 1 29*652f2efaSRob Herring 30*652f2efaSRob Herring '#size-cells': 31*652f2efaSRob Herring const: 0 32*652f2efaSRob Herring 33*652f2efaSRob HerringpatternProperties: 34*652f2efaSRob Herring '^mdio@[0-9a-f]+$': 35*652f2efaSRob Herring type: object 36*652f2efaSRob Herring 37*652f2efaSRob Herring properties: 38*652f2efaSRob Herring reg: 39*652f2efaSRob Herring maxItems: 1 40*652f2efaSRob Herring description: The sub-bus number. 41*652f2efaSRob Herring 42*652f2efaSRob HerringadditionalProperties: true 43*652f2efaSRob Herring 44*652f2efaSRob Herring... 45