1652f2efaSRob Herring# SPDX-License-Identifier: GPL-2.0 2652f2efaSRob Herring%YAML 1.2 3652f2efaSRob Herring--- 4652f2efaSRob Herring$id: http://devicetree.org/schemas/net/mdio-mux.yaml# 5652f2efaSRob Herring$schema: http://devicetree.org/meta-schemas/core.yaml# 6652f2efaSRob Herring 7652f2efaSRob Herringtitle: Common MDIO bus multiplexer/switch properties. 8652f2efaSRob Herring 9652f2efaSRob Herringmaintainers: 10652f2efaSRob Herring - Andrew Lunn <andrew@lunn.ch> 11652f2efaSRob Herring 12652f2efaSRob Herringdescription: |+ 13652f2efaSRob Herring An MDIO bus multiplexer/switch will have several child busses that are 14652f2efaSRob Herring numbered uniquely in a device dependent manner. The nodes for an MDIO 15652f2efaSRob Herring bus multiplexer/switch will have one child node for each child bus. 16652f2efaSRob Herring 17652f2efaSRob Herringproperties: 18652f2efaSRob Herring mdio-parent-bus: 19652f2efaSRob Herring $ref: /schemas/types.yaml#/definitions/phandle 20652f2efaSRob Herring description: 21652f2efaSRob Herring The phandle of the MDIO bus that this multiplexer's master-side port is 22652f2efaSRob Herring connected to. 23652f2efaSRob Herring 24652f2efaSRob Herring '#address-cells': 25652f2efaSRob Herring const: 1 26652f2efaSRob Herring 27652f2efaSRob Herring '#size-cells': 28652f2efaSRob Herring const: 0 29652f2efaSRob Herring 30652f2efaSRob HerringpatternProperties: 31652f2efaSRob Herring '^mdio@[0-9a-f]+$': 32*b2d28642SRob Herring $ref: mdio.yaml# 33*b2d28642SRob Herring unevaluatedProperties: false 34652f2efaSRob Herring 35652f2efaSRob Herring properties: 36652f2efaSRob Herring reg: 37652f2efaSRob Herring maxItems: 1 38652f2efaSRob Herring 39652f2efaSRob HerringadditionalProperties: true 40652f2efaSRob Herring 41652f2efaSRob Herring... 42