1*90c47eb1SMichael Walle# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2*90c47eb1SMichael Walle%YAML 1.2 3*90c47eb1SMichael Walle--- 4*90c47eb1SMichael Walle$id: http://devicetree.org/schemas/net/maxlinear,gpy2xx.yaml# 5*90c47eb1SMichael Walle$schema: http://devicetree.org/meta-schemas/core.yaml# 6*90c47eb1SMichael Walle 7*90c47eb1SMichael Walletitle: MaxLinear GPY2xx PHY 8*90c47eb1SMichael Walle 9*90c47eb1SMichael Wallemaintainers: 10*90c47eb1SMichael Walle - Andrew Lunn <andrew@lunn.ch> 11*90c47eb1SMichael Walle - Michael Walle <michael@walle.cc> 12*90c47eb1SMichael Walle 13*90c47eb1SMichael WalleallOf: 14*90c47eb1SMichael Walle - $ref: ethernet-phy.yaml# 15*90c47eb1SMichael Walle 16*90c47eb1SMichael Walleproperties: 17*90c47eb1SMichael Walle maxlinear,use-broken-interrupts: 18*90c47eb1SMichael Walle description: | 19*90c47eb1SMichael Walle Interrupts are broken on some GPY2xx PHYs in that they keep the 20*90c47eb1SMichael Walle interrupt line asserted even after the interrupt status register is 21*90c47eb1SMichael Walle cleared. Thus it is blocking the interrupt line which is usually bad 22*90c47eb1SMichael Walle for shared lines. By default interrupts are disabled for this PHY and 23*90c47eb1SMichael Walle polling mode is used. If one can live with the consequences, this 24*90c47eb1SMichael Walle property can be used to enable interrupt handling. 25*90c47eb1SMichael Walle 26*90c47eb1SMichael Walle Affected PHYs (as far as known) are GPY215B and GPY215C. 27*90c47eb1SMichael Walle type: boolean 28*90c47eb1SMichael Walle 29*90c47eb1SMichael Walledependencies: 30*90c47eb1SMichael Walle maxlinear,use-broken-interrupts: [ interrupts ] 31*90c47eb1SMichael Walle 32*90c47eb1SMichael WalleunevaluatedProperties: false 33*90c47eb1SMichael Walle 34*90c47eb1SMichael Walleexamples: 35*90c47eb1SMichael Walle - | 36*90c47eb1SMichael Walle ethernet { 37*90c47eb1SMichael Walle #address-cells = <1>; 38*90c47eb1SMichael Walle #size-cells = <0>; 39*90c47eb1SMichael Walle 40*90c47eb1SMichael Walle ethernet-phy@0 { 41*90c47eb1SMichael Walle reg = <0>; 42*90c47eb1SMichael Walle interrupts-extended = <&intc 0>; 43*90c47eb1SMichael Walle maxlinear,use-broken-interrupts; 44*90c47eb1SMichael Walle }; 45*90c47eb1SMichael Walle }; 46*90c47eb1SMichael Walle 47*90c47eb1SMichael Walle... 48