1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/ingenic,mac.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Bindings for MAC in Ingenic SoCs
8
9maintainers:
10  - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
11
12description:
13  The Ethernet Media Access Controller in Ingenic SoCs.
14
15properties:
16  compatible:
17    enum:
18      - ingenic,jz4775-mac
19      - ingenic,x1000-mac
20      - ingenic,x1600-mac
21      - ingenic,x1830-mac
22      - ingenic,x2000-mac
23
24  reg:
25    maxItems: 1
26
27  interrupts:
28    maxItems: 1
29
30  interrupt-names:
31    const: macirq
32
33  clocks:
34    maxItems: 1
35
36  clock-names:
37    const: stmmaceth
38
39  mode-reg:
40    description: An extra syscon register that control ethernet interface and timing delay
41
42  rx-clk-delay-ps:
43    description: RGMII receive clock delay defined in pico seconds
44
45  tx-clk-delay-ps:
46    description: RGMII transmit clock delay defined in pico seconds
47
48required:
49  - compatible
50  - reg
51  - interrupts
52  - interrupt-names
53  - clocks
54  - clock-names
55  - mode-reg
56
57additionalProperties: false
58
59examples:
60  - |
61    #include <dt-bindings/clock/ingenic,x1000-cgu.h>
62
63    mac: ethernet@134b0000 {
64        compatible = "ingenic,x1000-mac";
65        reg = <0x134b0000 0x2000>;
66
67        interrupt-parent = <&intc>;
68        interrupts = <55>;
69        interrupt-names = "macirq";
70
71        clocks = <&cgu X1000_CLK_MAC>;
72        clock-names = "stmmaceth";
73
74        mode-reg = <&mac_phy_ctrl>;
75    };
76...
77