1* MDIO IO device
2
3The MDIO is a bus to which the PHY devices are connected.  For each
4device that exists on this bus, a child node should be created.  See
5the definition of the PHY node in booting-without-of.txt for an example
6of how to define a PHY.
7
8Required properties:
9  - reg : Offset and length of the register set for the device
10  - compatible : Should define the compatible device type for the
11    mdio.  Currently, this is most likely to be "fsl,gianfar-mdio"
12
13Example:
14
15	mdio@24520 {
16		reg = <24520 20>;
17		compatible = "fsl,gianfar-mdio";
18
19		ethernet-phy@0 {
20			......
21		};
22	};
23
24* TBI Internal MDIO bus
25
26As of this writing, every tsec is associated with an internal TBI PHY.
27This PHY is accessed through the local MDIO bus.  These buses are defined
28similarly to the mdio buses, except they are compatible with "fsl,gianfar-tbi".
29The TBI PHYs underneath them are similar to normal PHYs, but the reg property
30is considered instructive, rather than descriptive.  The reg property should
31be chosen so it doesn't interfere with other PHYs on the bus.
32
33* Gianfar-compatible ethernet nodes
34
35Properties:
36
37  - device_type : Should be "network"
38  - model : Model of the device.  Can be "TSEC", "eTSEC", or "FEC"
39  - compatible : Should be "gianfar"
40  - reg : Offset and length of the register set for the device
41  - interrupts : For FEC devices, the first interrupt is the device's
42    interrupt.  For TSEC and eTSEC devices, the first interrupt is
43    transmit, the second is receive, and the third is error.
44  - phy-handle : See ethernet.txt file in the same directory.
45  - fixed-link : See fixed-link.txt in the same directory.
46  - phy-connection-type : See ethernet.txt file in the same directory.
47    This property is only really needed if the connection is of type
48    "rgmii-id", as all other connection types are detected by hardware.
49  - fsl,magic-packet : If present, indicates that the hardware supports
50    waking up via magic packet.
51  - bd-stash : If present, indicates that the hardware supports stashing
52    buffer descriptors in the L2.
53  - rx-stash-len : Denotes the number of bytes of a received buffer to stash
54    in the L2.
55  - rx-stash-idx : Denotes the index of the first byte from the received
56    buffer to stash in the L2.
57
58Example:
59	ethernet@24000 {
60		device_type = "network";
61		model = "TSEC";
62		compatible = "gianfar";
63		reg = <0x24000 0x1000>;
64		local-mac-address = [ 00 E0 0C 00 73 00 ];
65		interrupts = <29 2 30 2 34 2>;
66		interrupt-parent = <&mpic>;
67		phy-handle = <&phy0>
68	};
69
70* Gianfar PTP clock nodes
71
72General Properties:
73
74  - compatible   Should be "fsl,etsec-ptp"
75  - reg          Offset and length of the register set for the device
76  - interrupts   There should be at least two interrupts. Some devices
77                 have as many as four PTP related interrupts.
78
79Clock Properties:
80
81  - fsl,cksel        Timer reference clock source.
82  - fsl,tclk-period  Timer reference clock period in nanoseconds.
83  - fsl,tmr-prsc     Prescaler, divides the output clock.
84  - fsl,tmr-add      Frequency compensation value.
85  - fsl,tmr-fiper1   Fixed interval period pulse generator.
86  - fsl,tmr-fiper2   Fixed interval period pulse generator.
87  - fsl,max-adj      Maximum frequency adjustment in parts per billion.
88
89  These properties set the operational parameters for the PTP
90  clock. You must choose these carefully for the clock to work right.
91  Here is how to figure good values:
92
93  TimerOsc     = selected reference clock   MHz
94  tclk_period  = desired clock period       nanoseconds
95  NominalFreq  = 1000 / tclk_period         MHz
96  FreqDivRatio = TimerOsc / NominalFreq     (must be greater that 1.0)
97  tmr_add      = ceil(2^32 / FreqDivRatio)
98  OutputClock  = NominalFreq / tmr_prsc     MHz
99  PulseWidth   = 1 / OutputClock            microseconds
100  FiperFreq1   = desired frequency in Hz
101  FiperDiv1    = 1000000 * OutputClock / FiperFreq1
102  tmr_fiper1   = tmr_prsc * tclk_period * FiperDiv1 - tclk_period
103  max_adj      = 1000000000 * (FreqDivRatio - 1.0) - 1
104
105  The calculation for tmr_fiper2 is the same as for tmr_fiper1. The
106  driver expects that tmr_fiper1 will be correctly set to produce a 1
107  Pulse Per Second (PPS) signal, since this will be offered to the PPS
108  subsystem to synchronize the Linux clock.
109
110  Reference clock source is determined by the value, which is holded
111  in CKSEL bits in TMR_CTRL register. "fsl,cksel" property keeps the
112  value, which will be directly written in those bits, that is why,
113  according to reference manual, the next clock sources can be used:
114
115  <0> - external high precision timer reference clock (TSEC_TMR_CLK
116        input is used for this purpose);
117  <1> - eTSEC system clock;
118  <2> - eTSEC1 transmit clock;
119  <3> - RTC clock input.
120
121  When this attribute is not used, eTSEC system clock will serve as
122  IEEE 1588 timer reference clock.
123
124Example:
125
126	ptp_clock@24E00 {
127		compatible = "fsl,etsec-ptp";
128		reg = <0x24E00 0xB0>;
129		interrupts = <12 0x8 13 0x8>;
130		interrupt-parent = < &ipic >;
131		fsl,cksel       = <1>;
132		fsl,tclk-period = <10>;
133		fsl,tmr-prsc    = <100>;
134		fsl,tmr-add     = <0x999999A4>;
135		fsl,tmr-fiper1  = <0x3B9AC9F6>;
136		fsl,tmr-fiper2  = <0x00018696>;
137		fsl,max-adj     = <659999998>;
138	};
139