1d524dac9SGrant Likely* MDIO IO device 2d524dac9SGrant Likely 3d524dac9SGrant LikelyThe MDIO is a bus to which the PHY devices are connected. For each 4d524dac9SGrant Likelydevice that exists on this bus, a child node should be created. See 5d524dac9SGrant Likelythe definition of the PHY node in booting-without-of.txt for an example 6d524dac9SGrant Likelyof how to define a PHY. 7d524dac9SGrant Likely 8d524dac9SGrant LikelyRequired properties: 9d524dac9SGrant Likely - reg : Offset and length of the register set for the device 10d524dac9SGrant Likely - compatible : Should define the compatible device type for the 11d524dac9SGrant Likely mdio. Currently, this is most likely to be "fsl,gianfar-mdio" 12d524dac9SGrant Likely 13d524dac9SGrant LikelyExample: 14d524dac9SGrant Likely 15d524dac9SGrant Likely mdio@24520 { 16d524dac9SGrant Likely reg = <24520 20>; 17d524dac9SGrant Likely compatible = "fsl,gianfar-mdio"; 18d524dac9SGrant Likely 19d524dac9SGrant Likely ethernet-phy@0 { 20d524dac9SGrant Likely ...... 21d524dac9SGrant Likely }; 22d524dac9SGrant Likely }; 23d524dac9SGrant Likely 24d524dac9SGrant Likely* TBI Internal MDIO bus 25d524dac9SGrant Likely 26d524dac9SGrant LikelyAs of this writing, every tsec is associated with an internal TBI PHY. 27d524dac9SGrant LikelyThis PHY is accessed through the local MDIO bus. These buses are defined 28d524dac9SGrant Likelysimilarly to the mdio buses, except they are compatible with "fsl,gianfar-tbi". 29d524dac9SGrant LikelyThe TBI PHYs underneath them are similar to normal PHYs, but the reg property 30d524dac9SGrant Likelyis considered instructive, rather than descriptive. The reg property should 31d524dac9SGrant Likelybe chosen so it doesn't interfere with other PHYs on the bus. 32d524dac9SGrant Likely 33d524dac9SGrant Likely* Gianfar-compatible ethernet nodes 34d524dac9SGrant Likely 35d524dac9SGrant LikelyProperties: 36d524dac9SGrant Likely 37d524dac9SGrant Likely - device_type : Should be "network" 38d524dac9SGrant Likely - model : Model of the device. Can be "TSEC", "eTSEC", or "FEC" 39d524dac9SGrant Likely - compatible : Should be "gianfar" 40d524dac9SGrant Likely - reg : Offset and length of the register set for the device 41d524dac9SGrant Likely - interrupts : For FEC devices, the first interrupt is the device's 42d524dac9SGrant Likely interrupt. For TSEC and eTSEC devices, the first interrupt is 43d524dac9SGrant Likely transmit, the second is receive, and the third is error. 44e8f08ee0SSergei Shtylyov - phy-handle : See ethernet.txt file in the same directory. 45ae21888fSFlorian Fainelli - fixed-link : See fixed-link.txt in the same directory. 46e8f08ee0SSergei Shtylyov - phy-connection-type : See ethernet.txt file in the same directory. 47e8f08ee0SSergei Shtylyov This property is only really needed if the connection is of type 48e8f08ee0SSergei Shtylyov "rgmii-id", as all other connection types are detected by hardware. 49d524dac9SGrant Likely - fsl,magic-packet : If present, indicates that the hardware supports 50d524dac9SGrant Likely waking up via magic packet. 51d524dac9SGrant Likely - bd-stash : If present, indicates that the hardware supports stashing 52d524dac9SGrant Likely buffer descriptors in the L2. 53d524dac9SGrant Likely - rx-stash-len : Denotes the number of bytes of a received buffer to stash 54d524dac9SGrant Likely in the L2. 55d524dac9SGrant Likely - rx-stash-idx : Denotes the index of the first byte from the received 56d524dac9SGrant Likely buffer to stash in the L2. 57d524dac9SGrant Likely 58d524dac9SGrant LikelyExample: 59d524dac9SGrant Likely ethernet@24000 { 60d524dac9SGrant Likely device_type = "network"; 61d524dac9SGrant Likely model = "TSEC"; 62d524dac9SGrant Likely compatible = "gianfar"; 63d524dac9SGrant Likely reg = <0x24000 0x1000>; 64d524dac9SGrant Likely local-mac-address = [ 00 E0 0C 00 73 00 ]; 65d524dac9SGrant Likely interrupts = <29 2 30 2 34 2>; 66d524dac9SGrant Likely interrupt-parent = <&mpic>; 67d524dac9SGrant Likely phy-handle = <&phy0> 68d524dac9SGrant Likely }; 69c78275f3SRichard Cochran 70c78275f3SRichard Cochran* Gianfar PTP clock nodes 71c78275f3SRichard Cochran 72c78275f3SRichard CochranGeneral Properties: 73c78275f3SRichard Cochran 74c78275f3SRichard Cochran - compatible Should be "fsl,etsec-ptp" 75c78275f3SRichard Cochran - reg Offset and length of the register set for the device 76c78275f3SRichard Cochran - interrupts There should be at least two interrupts. Some devices 77c78275f3SRichard Cochran have as many as four PTP related interrupts. 78c78275f3SRichard Cochran 79c78275f3SRichard CochranClock Properties: 80c78275f3SRichard Cochran 81e58f6f4fSAida Mynzhasova - fsl,cksel Timer reference clock source. 82c78275f3SRichard Cochran - fsl,tclk-period Timer reference clock period in nanoseconds. 83c78275f3SRichard Cochran - fsl,tmr-prsc Prescaler, divides the output clock. 84c78275f3SRichard Cochran - fsl,tmr-add Frequency compensation value. 85c78275f3SRichard Cochran - fsl,tmr-fiper1 Fixed interval period pulse generator. 86c78275f3SRichard Cochran - fsl,tmr-fiper2 Fixed interval period pulse generator. 87c78275f3SRichard Cochran - fsl,max-adj Maximum frequency adjustment in parts per billion. 88c78275f3SRichard Cochran 89c78275f3SRichard Cochran These properties set the operational parameters for the PTP 90c78275f3SRichard Cochran clock. You must choose these carefully for the clock to work right. 91c78275f3SRichard Cochran Here is how to figure good values: 92c78275f3SRichard Cochran 93e58f6f4fSAida Mynzhasova TimerOsc = selected reference clock MHz 94c78275f3SRichard Cochran tclk_period = desired clock period nanoseconds 95c78275f3SRichard Cochran NominalFreq = 1000 / tclk_period MHz 96c78275f3SRichard Cochran FreqDivRatio = TimerOsc / NominalFreq (must be greater that 1.0) 97c78275f3SRichard Cochran tmr_add = ceil(2^32 / FreqDivRatio) 98c78275f3SRichard Cochran OutputClock = NominalFreq / tmr_prsc MHz 99c78275f3SRichard Cochran PulseWidth = 1 / OutputClock microseconds 100c78275f3SRichard Cochran FiperFreq1 = desired frequency in Hz 101c78275f3SRichard Cochran FiperDiv1 = 1000000 * OutputClock / FiperFreq1 102c78275f3SRichard Cochran tmr_fiper1 = tmr_prsc * tclk_period * FiperDiv1 - tclk_period 103c78275f3SRichard Cochran max_adj = 1000000000 * (FreqDivRatio - 1.0) - 1 104c78275f3SRichard Cochran 105c78275f3SRichard Cochran The calculation for tmr_fiper2 is the same as for tmr_fiper1. The 106c78275f3SRichard Cochran driver expects that tmr_fiper1 will be correctly set to produce a 1 107c78275f3SRichard Cochran Pulse Per Second (PPS) signal, since this will be offered to the PPS 108c78275f3SRichard Cochran subsystem to synchronize the Linux clock. 109c78275f3SRichard Cochran 110e58f6f4fSAida Mynzhasova Reference clock source is determined by the value, which is holded 111e58f6f4fSAida Mynzhasova in CKSEL bits in TMR_CTRL register. "fsl,cksel" property keeps the 112e58f6f4fSAida Mynzhasova value, which will be directly written in those bits, that is why, 113e58f6f4fSAida Mynzhasova according to reference manual, the next clock sources can be used: 114e58f6f4fSAida Mynzhasova 115e58f6f4fSAida Mynzhasova <0> - external high precision timer reference clock (TSEC_TMR_CLK 116e58f6f4fSAida Mynzhasova input is used for this purpose); 117e58f6f4fSAida Mynzhasova <1> - eTSEC system clock; 118e58f6f4fSAida Mynzhasova <2> - eTSEC1 transmit clock; 119e58f6f4fSAida Mynzhasova <3> - RTC clock input. 120e58f6f4fSAida Mynzhasova 121e58f6f4fSAida Mynzhasova When this attribute is not used, eTSEC system clock will serve as 122e58f6f4fSAida Mynzhasova IEEE 1588 timer reference clock. 123e58f6f4fSAida Mynzhasova 124c78275f3SRichard CochranExample: 125c78275f3SRichard Cochran 126c78275f3SRichard Cochran ptp_clock@24E00 { 127c78275f3SRichard Cochran compatible = "fsl,etsec-ptp"; 128c78275f3SRichard Cochran reg = <0x24E00 0xB0>; 129c78275f3SRichard Cochran interrupts = <12 0x8 13 0x8>; 130c78275f3SRichard Cochran interrupt-parent = < &ipic >; 131e58f6f4fSAida Mynzhasova fsl,cksel = <1>; 132c78275f3SRichard Cochran fsl,tclk-period = <10>; 133c78275f3SRichard Cochran fsl,tmr-prsc = <100>; 134c78275f3SRichard Cochran fsl,tmr-add = <0x999999A4>; 135c78275f3SRichard Cochran fsl,tmr-fiper1 = <0x3B9AC9F6>; 136c78275f3SRichard Cochran fsl,tmr-fiper2 = <0x00018696>; 137c78275f3SRichard Cochran fsl,max-adj = <659999998>; 138c78275f3SRichard Cochran }; 139