1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/net/fsl,fman-dtsec.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: NXP FMan MAC 8 9maintainers: 10 - Madalin Bucur <madalin.bucur@nxp.com> 11 12description: | 13 Each FMan has several MACs, each implementing an Ethernet interface. Earlier 14 versions of FMan used the Datapath Three Speed Ethernet Controller (dTSEC) for 15 10/100/1000 MBit/s speeds, and the 10-Gigabit Ethernet Media Access Controller 16 (10GEC) for 10 Gbit/s speeds. Later versions of FMan use the Multirate 17 Ethernet Media Access Controller (mEMAC) to handle all speeds. 18 19properties: 20 compatible: 21 enum: 22 - fsl,fman-dtsec 23 - fsl,fman-xgec 24 - fsl,fman-memac 25 26 cell-index: 27 maximum: 64 28 description: | 29 FManV2: 30 register[bit] MAC cell-index 31 ============================================================ 32 FM_EPI[16] XGEC 8 33 FM_EPI[16+n] dTSECn n-1 34 FM_NPI[11+n] dTSECn n-1 35 n = 1,..,5 36 37 FManV3: 38 register[bit] MAC cell-index 39 ============================================================ 40 FM_EPI[16+n] mEMACn n-1 41 FM_EPI[25] mEMAC10 9 42 43 FM_NPI[11+n] mEMACn n-1 44 FM_NPI[10] mEMAC10 9 45 FM_NPI[11] mEMAC9 8 46 n = 1,..8 47 48 FM_EPI and FM_NPI are located in the FMan memory map. 49 50 2. SoC registers: 51 52 - P2041, P3041, P4080 P5020, P5040: 53 register[bit] FMan MAC cell 54 Unit index 55 ============================================================ 56 DCFG_DEVDISR2[7] 1 XGEC 8 57 DCFG_DEVDISR2[7+n] 1 dTSECn n-1 58 DCFG_DEVDISR2[15] 2 XGEC 8 59 DCFG_DEVDISR2[15+n] 2 dTSECn n-1 60 n = 1,..5 61 62 - T1040, T2080, T4240, B4860: 63 register[bit] FMan MAC cell 64 Unit index 65 ============================================================ 66 DCFG_CCSR_DEVDISR2[n-1] 1 mEMACn n-1 67 DCFG_CCSR_DEVDISR2[11+n] 2 mEMACn n-1 68 n = 1,..6,9,10 69 70 EVDISR, DCFG_DEVDISR2 and DCFG_CCSR_DEVDISR2 are located in 71 the specific SoC "Device Configuration/Pin Control" Memory 72 Map. 73 74 reg: 75 maxItems: 1 76 77 fsl,fman-ports: 78 $ref: /schemas/types.yaml#/definitions/phandle-array 79 maxItems: 2 80 description: | 81 An array of two references: the first is the FMan RX port and the second 82 is the TX port used by this MAC. 83 84 ptp-timer: 85 $ref: /schemas/types.yaml#/definitions/phandle 86 description: A reference to the IEEE1588 timer 87 88 pcsphy-handle: 89 $ref: /schemas/types.yaml#/definitions/phandle 90 description: A reference to the PCS (typically found on the SerDes) 91 92 tbi-handle: 93 $ref: /schemas/types.yaml#/definitions/phandle 94 description: A reference to the (TBI-based) PCS 95 96required: 97 - compatible 98 - cell-index 99 - reg 100 - fsl,fman-ports 101 - ptp-timer 102 103allOf: 104 - $ref: ethernet-controller.yaml# 105 - if: 106 properties: 107 compatible: 108 contains: 109 const: fsl,fman-dtsec 110 then: 111 required: 112 - tbi-handle 113 - if: 114 properties: 115 compatible: 116 contains: 117 const: fsl,fman-memac 118 then: 119 required: 120 - pcsphy-handle 121 122unevaluatedProperties: false 123 124examples: 125 - | 126 ethernet@e0000 { 127 compatible = "fsl,fman-dtsec"; 128 cell-index = <0>; 129 reg = <0xe0000 0x1000>; 130 fsl,fman-ports = <&fman1_rx8 &fman1_tx28>; 131 ptp-timer = <&ptp_timer>; 132 tbi-handle = <&tbi0>; 133 }; 134 - | 135 ethernet@e8000 { 136 cell-index = <4>; 137 compatible = "fsl,fman-memac"; 138 reg = <0xe8000 0x1000>; 139 fsl,fman-ports = <&fman0_rx_0x0c &fman0_tx_0x2c>; 140 ptp-timer = <&ptp_timer0>; 141 pcsphy-handle = <&pcsphy4>; 142 phy-handle = <&sgmii_phy1>; 143 phy-connection-type = "sgmii"; 144 }; 145... 146