1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/dsa/nxp,sja1105.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NXP SJA1105 Automotive Ethernet Switch Family Device Tree Bindings
8
9description:
10  The SJA1105 SPI interface requires a CS-to-CLK time (t2 in UM10944.pdf) of at
11  least one half of t_CLK. At an SPI frequency of 1MHz, this means a minimum
12  cs_sck_delay of 500ns. Ensuring that this SPI timing requirement is observed
13  depends on the SPI bus master driver.
14
15allOf:
16  - $ref: "dsa.yaml#"
17
18maintainers:
19  - Vladimir Oltean <vladimir.oltean@nxp.com>
20
21properties:
22  compatible:
23    enum:
24      - nxp,sja1105e
25      - nxp,sja1105t
26      - nxp,sja1105p
27      - nxp,sja1105q
28      - nxp,sja1105r
29      - nxp,sja1105s
30      - nxp,sja1110a
31      - nxp,sja1110b
32      - nxp,sja1110c
33      - nxp,sja1110d
34
35  reg:
36    maxItems: 1
37
38  # Optional container node for the 2 internal MDIO buses of the SJA1110
39  # (one for the internal 100base-T1 PHYs and the other for the single
40  # 100base-TX PHY). The "reg" property does not have physical significance.
41  # The PHY addresses to port correspondence is as follows: for 100base-T1,
42  # port 5 has PHY 1, port 6 has PHY 2 etc, while for 100base-TX, port 1 has
43  # PHY 1.
44  mdios:
45    type: object
46
47    properties:
48      '#address-cells':
49        const: 1
50      '#size-cells':
51        const: 0
52
53    patternProperties:
54      "^mdio@[0-1]$":
55        type: object
56
57        allOf:
58          - $ref: "http://devicetree.org/schemas/net/mdio.yaml#"
59
60        properties:
61          compatible:
62            oneOf:
63              - enum:
64                  - nxp,sja1110-base-t1-mdio
65                  - nxp,sja1110-base-tx-mdio
66
67          reg:
68            oneOf:
69              - enum:
70                  - 0
71                  - 1
72
73        required:
74          - compatible
75          - reg
76
77required:
78  - compatible
79  - reg
80
81unevaluatedProperties: false
82
83examples:
84  - |
85    spi {
86            #address-cells = <1>;
87            #size-cells = <0>;
88
89            ethernet-switch@1 {
90                    reg = <0x1>;
91                    compatible = "nxp,sja1105t";
92
93                    ethernet-ports {
94                            #address-cells = <1>;
95                            #size-cells = <0>;
96
97                            port@0 {
98                                    phy-handle = <&rgmii_phy6>;
99                                    phy-mode = "rgmii-id";
100                                    reg = <0>;
101                            };
102
103                            port@1 {
104                                    phy-handle = <&rgmii_phy3>;
105                                    phy-mode = "rgmii-id";
106                                    reg = <1>;
107                            };
108
109                            port@2 {
110                                    phy-handle = <&rgmii_phy4>;
111                                    phy-mode = "rgmii-id";
112                                    reg = <2>;
113                            };
114
115                            port@3 {
116                                    phy-mode = "rgmii-id";
117                                    reg = <3>;
118                            };
119
120                            port@4 {
121                                    ethernet = <&enet2>;
122                                    phy-mode = "rgmii";
123                                    reg = <4>;
124
125                                    fixed-link {
126                                            speed = <1000>;
127                                            full-duplex;
128                                    };
129                            };
130                    };
131            };
132    };
133