1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/dsa/microchip,ksz.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Microchip KSZ Series Ethernet switches
8
9maintainers:
10  - Marek Vasut <marex@denx.de>
11  - Woojung Huh <Woojung.Huh@microchip.com>
12
13allOf:
14  - $ref: dsa.yaml#
15
16properties:
17  # See Documentation/devicetree/bindings/net/dsa/dsa.yaml for a list of additional
18  # required and optional properties.
19  compatible:
20    enum:
21      - microchip,ksz8765
22      - microchip,ksz8794
23      - microchip,ksz8795
24      - microchip,ksz8863
25      - microchip,ksz8873
26      - microchip,ksz9477
27      - microchip,ksz9897
28      - microchip,ksz9896
29      - microchip,ksz9567
30      - microchip,ksz8565
31      - microchip,ksz9893
32      - microchip,ksz9563
33      - microchip,ksz8563
34
35  reset-gpios:
36    description:
37      Should be a gpio specifier for a reset line.
38    maxItems: 1
39
40  microchip,synclko-125:
41    $ref: /schemas/types.yaml#/definitions/flag
42    description:
43      Set if the output SYNCLKO frequency should be set to 125MHz instead of 25MHz.
44
45required:
46  - compatible
47  - reg
48
49unevaluatedProperties: false
50
51examples:
52  - |
53    #include <dt-bindings/gpio/gpio.h>
54
55    // Ethernet switch connected via SPI to the host, CPU port wired to eth0:
56    eth0 {
57        fixed-link {
58            speed = <1000>;
59            full-duplex;
60        };
61    };
62
63    spi0 {
64        #address-cells = <1>;
65        #size-cells = <0>;
66
67        pinctrl-0 = <&pinctrl_spi_ksz>;
68        cs-gpios = <&pioC 25 0>;
69        id = <1>;
70
71        ksz9477: switch@0 {
72            compatible = "microchip,ksz9477";
73            reg = <0>;
74            reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
75
76            spi-max-frequency = <44000000>;
77
78            ethernet-ports {
79                #address-cells = <1>;
80                #size-cells = <0>;
81                port@0 {
82                    reg = <0>;
83                    label = "lan1";
84                };
85                port@1 {
86                    reg = <1>;
87                    label = "lan2";
88                };
89                port@2 {
90                    reg = <2>;
91                    label = "lan3";
92                };
93                port@3 {
94                    reg = <3>;
95                    label = "lan4";
96                };
97                port@4 {
98                    reg = <4>;
99                    label = "lan5";
100                };
101                port@5 {
102                    reg = <5>;
103                    label = "cpu";
104                    ethernet = <&eth0>;
105                    fixed-link {
106                        speed = <1000>;
107                        full-duplex;
108                    };
109                };
110            };
111        };
112
113        ksz8565: switch@1 {
114            compatible = "microchip,ksz8565";
115            reg = <1>;
116
117            spi-max-frequency = <44000000>;
118
119            ethernet-ports {
120                #address-cells = <1>;
121                #size-cells = <0>;
122                port@0 {
123                    reg = <0>;
124                    label = "lan1";
125                };
126                port@1 {
127                    reg = <1>;
128                    label = "lan2";
129                };
130                port@2 {
131                    reg = <2>;
132                    label = "lan3";
133                };
134                port@3 {
135                    reg = <3>;
136                    label = "lan4";
137                };
138                port@6 {
139                    reg = <6>;
140                    label = "cpu";
141                    ethernet = <&eth0>;
142                    fixed-link {
143                        speed = <1000>;
144                        full-duplex;
145                    };
146                };
147            };
148        };
149    };
150...
151