1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/dsa/microchip,ksz.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Microchip KSZ Series Ethernet switches
8
9maintainers:
10  - Marek Vasut <marex@denx.de>
11  - Woojung Huh <Woojung.Huh@microchip.com>
12
13allOf:
14  - $ref: dsa.yaml#
15
16properties:
17  # See Documentation/devicetree/bindings/net/dsa/dsa.yaml for a list of additional
18  # required and optional properties.
19  compatible:
20    enum:
21      - microchip,ksz8765
22      - microchip,ksz8794
23      - microchip,ksz8795
24      - microchip,ksz9477
25      - microchip,ksz9897
26      - microchip,ksz9896
27      - microchip,ksz9567
28      - microchip,ksz8565
29      - microchip,ksz9893
30      - microchip,ksz9563
31      - microchip,ksz8563
32
33  reset-gpios:
34    description:
35      Should be a gpio specifier for a reset line.
36    maxItems: 1
37
38  microchip,synclko-125:
39    $ref: /schemas/types.yaml#/definitions/flag
40    description:
41      Set if the output SYNCLKO frequency should be set to 125MHz instead of 25MHz.
42
43required:
44  - compatible
45  - reg
46
47unevaluatedProperties: false
48
49examples:
50  - |
51    #include <dt-bindings/gpio/gpio.h>
52
53    // Ethernet switch connected via SPI to the host, CPU port wired to eth0:
54    eth0 {
55        fixed-link {
56            speed = <1000>;
57            full-duplex;
58        };
59    };
60
61    spi0 {
62        #address-cells = <1>;
63        #size-cells = <0>;
64
65        pinctrl-0 = <&pinctrl_spi_ksz>;
66        cs-gpios = <&pioC 25 0>;
67        id = <1>;
68
69        ksz9477: switch@0 {
70            compatible = "microchip,ksz9477";
71            reg = <0>;
72            reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
73
74            spi-max-frequency = <44000000>;
75
76            ethernet-ports {
77                #address-cells = <1>;
78                #size-cells = <0>;
79                port@0 {
80                    reg = <0>;
81                    label = "lan1";
82                };
83                port@1 {
84                    reg = <1>;
85                    label = "lan2";
86                };
87                port@2 {
88                    reg = <2>;
89                    label = "lan3";
90                };
91                port@3 {
92                    reg = <3>;
93                    label = "lan4";
94                };
95                port@4 {
96                    reg = <4>;
97                    label = "lan5";
98                };
99                port@5 {
100                    reg = <5>;
101                    label = "cpu";
102                    ethernet = <&eth0>;
103                    fixed-link {
104                        speed = <1000>;
105                        full-duplex;
106                    };
107                };
108            };
109        };
110
111        ksz8565: switch@1 {
112            compatible = "microchip,ksz8565";
113            reg = <1>;
114
115            spi-max-frequency = <44000000>;
116
117            ethernet-ports {
118                #address-cells = <1>;
119                #size-cells = <0>;
120                port@0 {
121                    reg = <0>;
122                    label = "lan1";
123                };
124                port@1 {
125                    reg = <1>;
126                    label = "lan2";
127                };
128                port@2 {
129                    reg = <2>;
130                    label = "lan3";
131                };
132                port@3 {
133                    reg = <3>;
134                    label = "lan4";
135                };
136                port@6 {
137                    reg = <6>;
138                    label = "cpu";
139                    ethernet = <&eth0>;
140                    fixed-link {
141                        speed = <1000>;
142                        full-duplex;
143                    };
144                };
145            };
146        };
147    };
148...
149