1# SPDX-License-Identifier: GPL-2.0-only 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/net/dsa/microchip,ksz.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Microchip KSZ Series Ethernet switches 8 9maintainers: 10 - Marek Vasut <marex@denx.de> 11 - Woojung Huh <Woojung.Huh@microchip.com> 12 13allOf: 14 - $ref: dsa.yaml# 15 16properties: 17 # See Documentation/devicetree/bindings/net/dsa/dsa.yaml for a list of additional 18 # required and optional properties. 19 compatible: 20 enum: 21 - microchip,ksz8765 22 - microchip,ksz8794 23 - microchip,ksz8795 24 - microchip,ksz8863 25 - microchip,ksz8873 26 - microchip,ksz9477 27 - microchip,ksz9897 28 - microchip,ksz9896 29 - microchip,ksz9567 30 - microchip,ksz8565 31 - microchip,ksz9893 32 - microchip,ksz9563 33 - microchip,ksz8563 34 35 reset-gpios: 36 description: 37 Should be a gpio specifier for a reset line. 38 maxItems: 1 39 40 microchip,synclko-125: 41 $ref: /schemas/types.yaml#/definitions/flag 42 description: 43 Set if the output SYNCLKO frequency should be set to 125MHz instead of 25MHz. 44 45 microchip,synclko-disable: 46 $ref: /schemas/types.yaml#/definitions/flag 47 description: 48 Set if the output SYNCLKO clock should be disabled. Do not mix with 49 microchip,synclko-125. 50 51required: 52 - compatible 53 - reg 54 55unevaluatedProperties: false 56 57examples: 58 - | 59 #include <dt-bindings/gpio/gpio.h> 60 61 // Ethernet switch connected via SPI to the host, CPU port wired to eth0: 62 eth0 { 63 fixed-link { 64 speed = <1000>; 65 full-duplex; 66 }; 67 }; 68 69 spi0 { 70 #address-cells = <1>; 71 #size-cells = <0>; 72 73 pinctrl-0 = <&pinctrl_spi_ksz>; 74 cs-gpios = <&pioC 25 0>; 75 id = <1>; 76 77 ksz9477: switch@0 { 78 compatible = "microchip,ksz9477"; 79 reg = <0>; 80 reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; 81 82 spi-max-frequency = <44000000>; 83 84 ethernet-ports { 85 #address-cells = <1>; 86 #size-cells = <0>; 87 port@0 { 88 reg = <0>; 89 label = "lan1"; 90 }; 91 port@1 { 92 reg = <1>; 93 label = "lan2"; 94 }; 95 port@2 { 96 reg = <2>; 97 label = "lan3"; 98 }; 99 port@3 { 100 reg = <3>; 101 label = "lan4"; 102 }; 103 port@4 { 104 reg = <4>; 105 label = "lan5"; 106 }; 107 port@5 { 108 reg = <5>; 109 label = "cpu"; 110 ethernet = <ð0>; 111 fixed-link { 112 speed = <1000>; 113 full-duplex; 114 }; 115 }; 116 }; 117 }; 118 119 ksz8565: switch@1 { 120 compatible = "microchip,ksz8565"; 121 reg = <1>; 122 123 spi-max-frequency = <44000000>; 124 125 ethernet-ports { 126 #address-cells = <1>; 127 #size-cells = <0>; 128 port@0 { 129 reg = <0>; 130 label = "lan1"; 131 }; 132 port@1 { 133 reg = <1>; 134 label = "lan2"; 135 }; 136 port@2 { 137 reg = <2>; 138 label = "lan3"; 139 }; 140 port@3 { 141 reg = <3>; 142 label = "lan4"; 143 }; 144 port@6 { 145 reg = <6>; 146 label = "cpu"; 147 ethernet = <ð0>; 148 fixed-link { 149 speed = <1000>; 150 full-duplex; 151 }; 152 }; 153 }; 154 }; 155 }; 156... 157