1TI SoC Ethernet Switch Controller Device Tree Bindings
2------------------------------------------------------
3
4Required properties:
5- compatible		: Should be one of the below:-
6			  "ti,cpsw" for backward compatible
7			  "ti,am335x-cpsw" for AM335x controllers
8			  "ti,am4372-cpsw" for AM437x controllers
9			  "ti,dra7-cpsw" for DRA7x controllers
10- reg			: physical base address and size of the cpsw
11			  registers map
12- interrupts		: property with a value describing the interrupt
13			  number
14- interrupt-parent	: The parent interrupt controller
15- cpdma_channels 	: Specifies number of channels in CPDMA
16- ale_entries		: Specifies No of entries ALE can hold
17- bd_ram_size		: Specifies internal descriptor RAM size
18- rx_descs		: Specifies number of Rx descriptors
19- mac_control		: Specifies Default MAC control register content
20			  for the specific platform
21- slaves		: Specifies number for slaves
22- active_slave		: Specifies the slave to use for time stamping,
23			  ethtool and SIOCGMIIPHY
24- cpts_clock_mult	: Numerator to convert input clock ticks into nanoseconds
25- cpts_clock_shift	: Denominator to convert input clock ticks into nanoseconds
26
27Optional properties:
28- ti,hwmods		: Must be "cpgmac0"
29- no_bd_ram		: Must be 0 or 1
30- dual_emac		: Specifies Switch to act as Dual EMAC
31- syscon		: Phandle to the system control device node, which is
32			  the control module device of the am33x
33
34Slave Properties:
35Required properties:
36- phy_id		: Specifies slave phy id
37- phy-mode		: See ethernet.txt file in the same directory
38
39Optional properties:
40- dual_emac_res_vlan	: Specifies VID to be used to segregate the ports
41- mac-address		: See ethernet.txt file in the same directory
42
43Note: "ti,hwmods" field is used to fetch the base address and irq
44resources from TI, omap hwmod data base during device registration.
45Future plan is to migrate hwmod data base contents into device tree
46blob so that, all the required data will be used from device tree dts
47file.
48
49Examples:
50
51	mac: ethernet@4A100000 {
52		compatible = "ti,cpsw";
53		reg = <0x4A100000 0x1000>;
54		interrupts = <55 0x4>;
55		interrupt-parent = <&intc>;
56		cpdma_channels = <8>;
57		ale_entries = <1024>;
58		bd_ram_size = <0x2000>;
59		no_bd_ram = <0>;
60		rx_descs = <64>;
61		mac_control = <0x20>;
62		slaves = <2>;
63		active_slave = <0>;
64		cpts_clock_mult = <0x80000000>;
65		cpts_clock_shift = <29>;
66		syscon = <&cm>;
67		cpsw_emac0: slave@0 {
68			phy_id = <&davinci_mdio>, <0>;
69			phy-mode = "rgmii-txid";
70			/* Filled in by U-Boot */
71			mac-address = [ 00 00 00 00 00 00 ];
72		};
73		cpsw_emac1: slave@1 {
74			phy_id = <&davinci_mdio>, <1>;
75			phy-mode = "rgmii-txid";
76			/* Filled in by U-Boot */
77			mac-address = [ 00 00 00 00 00 00 ];
78		};
79	};
80
81(or)
82	mac: ethernet@4A100000 {
83		compatible = "ti,cpsw";
84		ti,hwmods = "cpgmac0";
85		cpdma_channels = <8>;
86		ale_entries = <1024>;
87		bd_ram_size = <0x2000>;
88		no_bd_ram = <0>;
89		rx_descs = <64>;
90		mac_control = <0x20>;
91		slaves = <2>;
92		active_slave = <0>;
93		cpts_clock_mult = <0x80000000>;
94		cpts_clock_shift = <29>;
95		syscon = <&cm>;
96		cpsw_emac0: slave@0 {
97			phy_id = <&davinci_mdio>, <0>;
98			phy-mode = "rgmii-txid";
99			/* Filled in by U-Boot */
100			mac-address = [ 00 00 00 00 00 00 ];
101		};
102		cpsw_emac1: slave@1 {
103			phy_id = <&davinci_mdio>, <1>;
104			phy-mode = "rgmii-txid";
105			/* Filled in by U-Boot */
106			mac-address = [ 00 00 00 00 00 00 ];
107		};
108	};
109