1736b1c9cSDavid Daney* MIX Ethernet controller. 2736b1c9cSDavid Daney 3736b1c9cSDavid DaneyProperties: 4736b1c9cSDavid Daney- compatible: "cavium,octeon-5750-mix" 5736b1c9cSDavid Daney 6736b1c9cSDavid Daney Compatibility with all cn5XXX and cn6XXX SOCs populated with MIX 7736b1c9cSDavid Daney devices. 8736b1c9cSDavid Daney 9736b1c9cSDavid Daney- reg: The base addresses of four separate register banks. The first 10736b1c9cSDavid Daney bank contains the MIX registers. The second bank the corresponding 11736b1c9cSDavid Daney AGL registers. The third bank are the AGL registers shared by all 12736b1c9cSDavid Daney MIX devices present. The fourth bank is the AGL_PRT_CTL shared by 13736b1c9cSDavid Daney all MIX devices present. 14736b1c9cSDavid Daney 15736b1c9cSDavid Daney- cell-index: A single cell specifying which portion of the shared 16736b1c9cSDavid Daney register banks corresponds to this MIX device. 17736b1c9cSDavid Daney 18736b1c9cSDavid Daney- interrupts: Two interrupt specifiers. The first is the MIX 19736b1c9cSDavid Daney interrupt routing and the second the routing for the AGL interrupts. 20736b1c9cSDavid Daney 21e8f08ee0SSergei Shtylyov- phy-handle: Optional, see ethernet.txt file in the same directory. 22736b1c9cSDavid Daney 23736b1c9cSDavid DaneyExample: 24736b1c9cSDavid Daney ethernet@1070000100800 { 25736b1c9cSDavid Daney compatible = "cavium,octeon-5750-mix"; 26736b1c9cSDavid Daney reg = <0x10700 0x00100800 0x0 0x100>, /* MIX */ 27736b1c9cSDavid Daney <0x11800 0xE0000800 0x0 0x300>, /* AGL */ 28736b1c9cSDavid Daney <0x11800 0xE0000400 0x0 0x400>, /* AGL_SHARED */ 29736b1c9cSDavid Daney <0x11800 0xE0002008 0x0 0x8>; /* AGL_PRT_CTL */ 30736b1c9cSDavid Daney cell-index = <1>; 31736b1c9cSDavid Daney interrupts = <1 18>, < 1 46>; 32736b1c9cSDavid Daney local-mac-address = [ 00 0f b7 10 63 54 ]; 33736b1c9cSDavid Daney phy-handle = <&phy1>; 34736b1c9cSDavid Daney }; 35