1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/can/renesas,rcar-canfd.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas R-Car CAN FD Controller
8
9maintainers:
10  - Fabrizio Castro <fabrizio.castro.jz@renesas.com>
11
12allOf:
13  - $ref: can-controller.yaml#
14
15properties:
16  compatible:
17    oneOf:
18      - items:
19          - enum:
20              - renesas,r8a774a1-canfd     # RZ/G2M
21              - renesas,r8a774b1-canfd     # RZ/G2N
22              - renesas,r8a774c0-canfd     # RZ/G2E
23              - renesas,r8a774e1-canfd     # RZ/G2H
24              - renesas,r8a7795-canfd      # R-Car H3
25              - renesas,r8a7796-canfd      # R-Car M3-W
26              - renesas,r8a77965-canfd     # R-Car M3-N
27              - renesas,r8a77970-canfd     # R-Car V3M
28              - renesas,r8a77980-canfd     # R-Car V3H
29              - renesas,r8a77990-canfd     # R-Car E3
30              - renesas,r8a77995-canfd     # R-Car D3
31          - const: renesas,rcar-gen3-canfd # R-Car Gen3 and RZ/G2
32
33      - items:
34          - enum:
35              - renesas,r9a07g044-canfd    # RZ/G2{L,LC}
36              - renesas,r9a07g054-canfd    # RZ/V2L
37          - const: renesas,rzg2l-canfd     # RZ/G2L family
38
39      - const: renesas,r8a779a0-canfd      # R-Car V3U
40
41  reg:
42    maxItems: 1
43
44  interrupts: true
45
46  clocks:
47    maxItems: 3
48
49  clock-names:
50    items:
51      - const: fck
52      - const: canfd
53      - const: can_clk
54
55  power-domains:
56    maxItems: 1
57
58  resets: true
59
60  renesas,no-can-fd:
61    $ref: /schemas/types.yaml#/definitions/flag
62    description:
63      The controller can operate in either CAN FD only mode (default) or
64      Classical CAN only mode.  The mode is global to both the channels.
65      Specify this property to put the controller in Classical CAN only mode.
66
67  assigned-clocks:
68    description:
69      Reference to the CANFD clock.  The CANFD clock is a div6 clock and can be
70      used by both CAN (if present) and CAN FD controllers at the same time.
71      It needs to be scaled to maximum frequency if any of these controllers
72      use it.
73
74  assigned-clock-rates:
75    description: Maximum frequency of the CANFD clock.
76
77patternProperties:
78  "^channel[01]$":
79    type: object
80    description:
81      The controller supports two channels and each is represented as a child
82      node.  Each child node supports the "status" property only, which
83      is used to enable/disable the respective channel.
84
85required:
86  - compatible
87  - reg
88  - interrupts
89  - clocks
90  - clock-names
91  - power-domains
92  - resets
93  - assigned-clocks
94  - assigned-clock-rates
95  - channel0
96  - channel1
97
98if:
99  properties:
100    compatible:
101      contains:
102        enum:
103          - renesas,rzg2l-canfd
104then:
105  properties:
106    interrupts:
107      items:
108        - description: CAN global error interrupt
109        - description: CAN receive FIFO interrupt
110        - description: CAN0 error interrupt
111        - description: CAN0 transmit interrupt
112        - description: CAN0 transmit/receive FIFO receive completion interrupt
113        - description: CAN1 error interrupt
114        - description: CAN1 transmit interrupt
115        - description: CAN1 transmit/receive FIFO receive completion interrupt
116
117    interrupt-names:
118      items:
119        - const: g_err
120        - const: g_recc
121        - const: ch0_err
122        - const: ch0_rec
123        - const: ch0_trx
124        - const: ch1_err
125        - const: ch1_rec
126        - const: ch1_trx
127
128    resets:
129      maxItems: 2
130
131    reset-names:
132      items:
133        - const: rstp_n
134        - const: rstc_n
135
136  required:
137    - interrupt-names
138    - reset-names
139else:
140  properties:
141    interrupts:
142      items:
143        - description: Channel interrupt
144        - description: Global interrupt
145
146    interrupt-names:
147      items:
148        - const: ch_int
149        - const: g_int
150
151    resets:
152      maxItems: 1
153
154unevaluatedProperties: false
155
156examples:
157  - |
158    #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
159    #include <dt-bindings/interrupt-controller/arm-gic.h>
160    #include <dt-bindings/power/r8a7795-sysc.h>
161
162    canfd: can@e66c0000 {
163            compatible = "renesas,r8a7795-canfd",
164                         "renesas,rcar-gen3-canfd";
165            reg = <0xe66c0000 0x8000>;
166            interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
167                         <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
168            clocks = <&cpg CPG_MOD 914>,
169                     <&cpg CPG_CORE R8A7795_CLK_CANFD>,
170                     <&can_clk>;
171            clock-names = "fck", "canfd", "can_clk";
172            assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
173            assigned-clock-rates = <40000000>;
174            power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
175            resets = <&cpg 914>;
176
177            channel0 {
178            };
179
180            channel1 {
181            };
182    };
183