1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/can/renesas,rcar-canfd.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas R-Car CAN FD Controller
8
9maintainers:
10  - Fabrizio Castro <fabrizio.castro.jz@renesas.com>
11
12allOf:
13  - $ref: can-controller.yaml#
14
15properties:
16  compatible:
17    oneOf:
18      - items:
19          - enum:
20              - renesas,r8a774a1-canfd     # RZ/G2M
21              - renesas,r8a774b1-canfd     # RZ/G2N
22              - renesas,r8a774c0-canfd     # RZ/G2E
23              - renesas,r8a774e1-canfd     # RZ/G2H
24              - renesas,r8a7795-canfd      # R-Car H3
25              - renesas,r8a7796-canfd      # R-Car M3-W
26              - renesas,r8a77965-canfd     # R-Car M3-N
27              - renesas,r8a77970-canfd     # R-Car V3M
28              - renesas,r8a77980-canfd     # R-Car V3H
29              - renesas,r8a77990-canfd     # R-Car E3
30              - renesas,r8a77995-canfd     # R-Car D3
31          - const: renesas,rcar-gen3-canfd # R-Car Gen3 and RZ/G2
32
33      - items:
34          - enum:
35              - renesas,r9a07g044-canfd    # RZ/G2{L,LC}
36              - renesas,r9a07g054-canfd    # RZ/V2L
37          - const: renesas,rzg2l-canfd     # RZ/G2L family
38
39  reg:
40    maxItems: 1
41
42  interrupts: true
43
44  clocks:
45    maxItems: 3
46
47  clock-names:
48    items:
49      - const: fck
50      - const: canfd
51      - const: can_clk
52
53  power-domains:
54    maxItems: 1
55
56  resets: true
57
58  renesas,no-can-fd:
59    $ref: /schemas/types.yaml#/definitions/flag
60    description:
61      The controller can operate in either CAN FD only mode (default) or
62      Classical CAN only mode.  The mode is global to both the channels.
63      Specify this property to put the controller in Classical CAN only mode.
64
65  assigned-clocks:
66    description:
67      Reference to the CANFD clock.  The CANFD clock is a div6 clock and can be
68      used by both CAN (if present) and CAN FD controllers at the same time.
69      It needs to be scaled to maximum frequency if any of these controllers
70      use it.
71
72  assigned-clock-rates:
73    description: Maximum frequency of the CANFD clock.
74
75patternProperties:
76  "^channel[01]$":
77    type: object
78    description:
79      The controller supports two channels and each is represented as a child
80      node.  Each child node supports the "status" property only, which
81      is used to enable/disable the respective channel.
82
83required:
84  - compatible
85  - reg
86  - interrupts
87  - clocks
88  - clock-names
89  - power-domains
90  - resets
91  - assigned-clocks
92  - assigned-clock-rates
93  - channel0
94  - channel1
95
96if:
97  properties:
98    compatible:
99      contains:
100        enum:
101          - renesas,rzg2l-canfd
102then:
103  properties:
104    interrupts:
105      items:
106        - description: CAN global error interrupt
107        - description: CAN receive FIFO interrupt
108        - description: CAN0 error interrupt
109        - description: CAN0 transmit interrupt
110        - description: CAN0 transmit/receive FIFO receive completion interrupt
111        - description: CAN1 error interrupt
112        - description: CAN1 transmit interrupt
113        - description: CAN1 transmit/receive FIFO receive completion interrupt
114
115    interrupt-names:
116      items:
117        - const: g_err
118        - const: g_recc
119        - const: ch0_err
120        - const: ch0_rec
121        - const: ch0_trx
122        - const: ch1_err
123        - const: ch1_rec
124        - const: ch1_trx
125
126    resets:
127      maxItems: 2
128
129    reset-names:
130      items:
131        - const: rstp_n
132        - const: rstc_n
133
134  required:
135    - interrupt-names
136    - reset-names
137else:
138  properties:
139    interrupts:
140      items:
141        - description: Channel interrupt
142        - description: Global interrupt
143
144    interrupt-names:
145      items:
146        - const: ch_int
147        - const: g_int
148
149    resets:
150      maxItems: 1
151
152unevaluatedProperties: false
153
154examples:
155  - |
156    #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
157    #include <dt-bindings/interrupt-controller/arm-gic.h>
158    #include <dt-bindings/power/r8a7795-sysc.h>
159
160    canfd: can@e66c0000 {
161            compatible = "renesas,r8a7795-canfd",
162                         "renesas,rcar-gen3-canfd";
163            reg = <0xe66c0000 0x8000>;
164            interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
165                         <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
166            clocks = <&cpg CPG_MOD 914>,
167                     <&cpg CPG_CORE R8A7795_CLK_CANFD>,
168                     <&can_clk>;
169            clock-names = "fck", "canfd", "can_clk";
170            assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
171            assigned-clock-rates = <40000000>;
172            power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
173            resets = <&cpg 914>;
174
175            channel0 {
176            };
177
178            channel1 {
179            };
180    };
181