1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/can/renesas,rcar-canfd.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas R-Car CAN FD Controller
8
9maintainers:
10  - Fabrizio Castro <fabrizio.castro.jz@renesas.com>
11
12properties:
13  compatible:
14    oneOf:
15      - items:
16          - enum:
17              - renesas,r8a774a1-canfd     # RZ/G2M
18              - renesas,r8a774b1-canfd     # RZ/G2N
19              - renesas,r8a774c0-canfd     # RZ/G2E
20              - renesas,r8a774e1-canfd     # RZ/G2H
21              - renesas,r8a7795-canfd      # R-Car H3
22              - renesas,r8a7796-canfd      # R-Car M3-W
23              - renesas,r8a77961-canfd     # R-Car M3-W+
24              - renesas,r8a77965-canfd     # R-Car M3-N
25              - renesas,r8a77970-canfd     # R-Car V3M
26              - renesas,r8a77980-canfd     # R-Car V3H
27              - renesas,r8a77990-canfd     # R-Car E3
28              - renesas,r8a77995-canfd     # R-Car D3
29          - const: renesas,rcar-gen3-canfd # R-Car Gen3 and RZ/G2
30
31      - items:
32          - enum:
33              - renesas,r9a07g043-canfd    # RZ/G2UL and RZ/Five
34              - renesas,r9a07g044-canfd    # RZ/G2{L,LC}
35              - renesas,r9a07g054-canfd    # RZ/V2L
36          - const: renesas,rzg2l-canfd     # RZ/G2L family
37
38      - const: renesas,r8a779a0-canfd      # R-Car V3U
39
40  reg:
41    maxItems: 1
42
43  interrupts: true
44
45  clocks:
46    maxItems: 3
47
48  clock-names:
49    items:
50      - const: fck
51      - const: canfd
52      - const: can_clk
53
54  power-domains:
55    maxItems: 1
56
57  resets: true
58
59  renesas,no-can-fd:
60    $ref: /schemas/types.yaml#/definitions/flag
61    description:
62      The controller can operate in either CAN FD only mode (default) or
63      Classical CAN only mode.  The mode is global to both the channels.
64      Specify this property to put the controller in Classical CAN only mode.
65
66  assigned-clocks:
67    description:
68      Reference to the CANFD clock.  The CANFD clock is a div6 clock and can be
69      used by both CAN (if present) and CAN FD controllers at the same time.
70      It needs to be scaled to maximum frequency if any of these controllers
71      use it.
72
73  assigned-clock-rates:
74    description: Maximum frequency of the CANFD clock.
75
76patternProperties:
77  "^channel[0-7]$":
78    type: object
79    description:
80      The controller supports multiple channels and each is represented as a
81      child node.  Each channel can be enabled/disabled individually.
82
83    additionalProperties: false
84
85required:
86  - compatible
87  - reg
88  - interrupts
89  - interrupt-names
90  - clocks
91  - clock-names
92  - power-domains
93  - resets
94  - assigned-clocks
95  - assigned-clock-rates
96  - channel0
97  - channel1
98
99allOf:
100  - $ref: can-controller.yaml#
101
102  - if:
103      properties:
104        compatible:
105          contains:
106            enum:
107              - renesas,rzg2l-canfd
108    then:
109      properties:
110        interrupts:
111          items:
112            - description: CAN global error interrupt
113            - description: CAN receive FIFO interrupt
114            - description: CAN0 error interrupt
115            - description: CAN0 transmit interrupt
116            - description: CAN0 transmit/receive FIFO receive completion interrupt
117            - description: CAN1 error interrupt
118            - description: CAN1 transmit interrupt
119            - description: CAN1 transmit/receive FIFO receive completion interrupt
120
121        interrupt-names:
122          items:
123            - const: g_err
124            - const: g_recc
125            - const: ch0_err
126            - const: ch0_rec
127            - const: ch0_trx
128            - const: ch1_err
129            - const: ch1_rec
130            - const: ch1_trx
131
132        resets:
133          maxItems: 2
134
135        reset-names:
136          items:
137            - const: rstp_n
138            - const: rstc_n
139
140      required:
141        - reset-names
142    else:
143      properties:
144        interrupts:
145          items:
146            - description: Channel interrupt
147            - description: Global interrupt
148
149        interrupt-names:
150          items:
151            - const: ch_int
152            - const: g_int
153
154        resets:
155          maxItems: 1
156
157  - if:
158      not:
159        properties:
160          compatible:
161            contains:
162              const: renesas,r8a779a0-canfd
163    then:
164      patternProperties:
165        "^channel[2-7]$": false
166
167unevaluatedProperties: false
168
169examples:
170  - |
171    #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
172    #include <dt-bindings/interrupt-controller/arm-gic.h>
173    #include <dt-bindings/power/r8a7795-sysc.h>
174
175    canfd: can@e66c0000 {
176            compatible = "renesas,r8a7795-canfd",
177                         "renesas,rcar-gen3-canfd";
178            reg = <0xe66c0000 0x8000>;
179            interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
180                         <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
181            interrupt-names = "ch_int", "g_int";
182            clocks = <&cpg CPG_MOD 914>,
183                     <&cpg CPG_CORE R8A7795_CLK_CANFD>,
184                     <&can_clk>;
185            clock-names = "fck", "canfd", "can_clk";
186            assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
187            assigned-clock-rates = <40000000>;
188            power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
189            resets = <&cpg 914>;
190
191            channel0 {
192            };
193
194            channel1 {
195            };
196    };
197