1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/can/renesas,rcar-canfd.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas R-Car CAN FD Controller
8
9maintainers:
10  - Fabrizio Castro <fabrizio.castro.jz@renesas.com>
11
12allOf:
13  - $ref: can-controller.yaml#
14
15properties:
16  compatible:
17    oneOf:
18      - items:
19          - enum:
20              - renesas,r8a774a1-canfd     # RZ/G2M
21              - renesas,r8a774b1-canfd     # RZ/G2N
22              - renesas,r8a774c0-canfd     # RZ/G2E
23              - renesas,r8a774e1-canfd     # RZ/G2H
24              - renesas,r8a7795-canfd      # R-Car H3
25              - renesas,r8a7796-canfd      # R-Car M3-W
26              - renesas,r8a77965-canfd     # R-Car M3-N
27              - renesas,r8a77970-canfd     # R-Car V3M
28              - renesas,r8a77980-canfd     # R-Car V3H
29              - renesas,r8a77990-canfd     # R-Car E3
30              - renesas,r8a77995-canfd     # R-Car D3
31          - const: renesas,rcar-gen3-canfd # R-Car Gen3 and RZ/G2
32
33      - items:
34          - enum:
35              - renesas,r9a07g044-canfd    # RZ/G2{L,LC}
36          - const: renesas,rzg2l-canfd     # RZ/G2L family
37
38  reg:
39    maxItems: 1
40
41  interrupts: true
42
43  clocks:
44    maxItems: 3
45
46  clock-names:
47    items:
48      - const: fck
49      - const: canfd
50      - const: can_clk
51
52  power-domains:
53    maxItems: 1
54
55  resets: true
56
57  renesas,no-can-fd:
58    $ref: /schemas/types.yaml#/definitions/flag
59    description:
60      The controller can operate in either CAN FD only mode (default) or
61      Classical CAN only mode.  The mode is global to both the channels.
62      Specify this property to put the controller in Classical CAN only mode.
63
64  assigned-clocks:
65    description:
66      Reference to the CANFD clock.  The CANFD clock is a div6 clock and can be
67      used by both CAN (if present) and CAN FD controllers at the same time.
68      It needs to be scaled to maximum frequency if any of these controllers
69      use it.
70
71  assigned-clock-rates:
72    description: Maximum frequency of the CANFD clock.
73
74patternProperties:
75  "^channel[01]$":
76    type: object
77    description:
78      The controller supports two channels and each is represented as a child
79      node.  Each child node supports the "status" property only, which
80      is used to enable/disable the respective channel.
81
82required:
83  - compatible
84  - reg
85  - interrupts
86  - clocks
87  - clock-names
88  - power-domains
89  - resets
90  - assigned-clocks
91  - assigned-clock-rates
92  - channel0
93  - channel1
94
95if:
96  properties:
97    compatible:
98      contains:
99        enum:
100          - renesas,rzg2l-canfd
101then:
102  properties:
103    interrupts:
104      items:
105        - description: CAN global error interrupt
106        - description: CAN receive FIFO interrupt
107        - description: CAN0 error interrupt
108        - description: CAN0 transmit interrupt
109        - description: CAN0 transmit/receive FIFO receive completion interrupt
110        - description: CAN1 error interrupt
111        - description: CAN1 transmit interrupt
112        - description: CAN1 transmit/receive FIFO receive completion interrupt
113
114    interrupt-names:
115      items:
116        - const: g_err
117        - const: g_recc
118        - const: ch0_err
119        - const: ch0_rec
120        - const: ch0_trx
121        - const: ch1_err
122        - const: ch1_rec
123        - const: ch1_trx
124
125    resets:
126      maxItems: 2
127
128    reset-names:
129      items:
130        - const: rstp_n
131        - const: rstc_n
132
133  required:
134    - interrupt-names
135    - reset-names
136else:
137  properties:
138    interrupts:
139      items:
140        - description: Channel interrupt
141        - description: Global interrupt
142
143    interrupt-names:
144      items:
145        - const: ch_int
146        - const: g_int
147
148    resets:
149      maxItems: 1
150
151unevaluatedProperties: false
152
153examples:
154  - |
155    #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
156    #include <dt-bindings/interrupt-controller/arm-gic.h>
157    #include <dt-bindings/power/r8a7795-sysc.h>
158
159    canfd: can@e66c0000 {
160            compatible = "renesas,r8a7795-canfd",
161                         "renesas,rcar-gen3-canfd";
162            reg = <0xe66c0000 0x8000>;
163            interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
164                         <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
165            clocks = <&cpg CPG_MOD 914>,
166                     <&cpg CPG_CORE R8A7795_CLK_CANFD>,
167                     <&can_clk>;
168            clock-names = "fck", "canfd", "can_clk";
169            assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
170            assigned-clock-rates = <40000000>;
171            power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
172            resets = <&cpg 914>;
173
174            channel0 {
175            };
176
177            channel1 {
178            };
179    };
180