18a5e7d19SGeert Uytterhoeven# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 28a5e7d19SGeert Uytterhoeven%YAML 1.2 38a5e7d19SGeert Uytterhoeven--- 48a5e7d19SGeert Uytterhoeven$id: http://devicetree.org/schemas/net/can/renesas,rcar-canfd.yaml# 58a5e7d19SGeert Uytterhoeven$schema: http://devicetree.org/meta-schemas/core.yaml# 68a5e7d19SGeert Uytterhoeven 78a5e7d19SGeert Uytterhoeventitle: Renesas R-Car CAN FD Controller 88a5e7d19SGeert Uytterhoeven 98a5e7d19SGeert Uytterhoevenmaintainers: 108a5e7d19SGeert Uytterhoeven - Fabrizio Castro <fabrizio.castro.jz@renesas.com> 118a5e7d19SGeert Uytterhoeven 128a5e7d19SGeert UytterhoevenallOf: 138a5e7d19SGeert Uytterhoeven - $ref: can-controller.yaml# 148a5e7d19SGeert Uytterhoeven 158a5e7d19SGeert Uytterhoevenproperties: 168a5e7d19SGeert Uytterhoeven compatible: 178a5e7d19SGeert Uytterhoeven oneOf: 188a5e7d19SGeert Uytterhoeven - items: 198a5e7d19SGeert Uytterhoeven - enum: 208a5e7d19SGeert Uytterhoeven - renesas,r8a774a1-canfd # RZ/G2M 218a5e7d19SGeert Uytterhoeven - renesas,r8a774b1-canfd # RZ/G2N 228a5e7d19SGeert Uytterhoeven - renesas,r8a774c0-canfd # RZ/G2E 238a5e7d19SGeert Uytterhoeven - renesas,r8a774e1-canfd # RZ/G2H 248a5e7d19SGeert Uytterhoeven - renesas,r8a7795-canfd # R-Car H3 258a5e7d19SGeert Uytterhoeven - renesas,r8a7796-canfd # R-Car M3-W 268a5e7d19SGeert Uytterhoeven - renesas,r8a77965-canfd # R-Car M3-N 278a5e7d19SGeert Uytterhoeven - renesas,r8a77970-canfd # R-Car V3M 288a5e7d19SGeert Uytterhoeven - renesas,r8a77980-canfd # R-Car V3H 298a5e7d19SGeert Uytterhoeven - renesas,r8a77990-canfd # R-Car E3 308a5e7d19SGeert Uytterhoeven - renesas,r8a77995-canfd # R-Car D3 318a5e7d19SGeert Uytterhoeven - const: renesas,rcar-gen3-canfd # R-Car Gen3 and RZ/G2 328a5e7d19SGeert Uytterhoeven 33*1aa5a06cSLad Prabhakar - items: 34*1aa5a06cSLad Prabhakar - enum: 35*1aa5a06cSLad Prabhakar - renesas,r9a07g044-canfd # RZ/G2{L,LC} 36*1aa5a06cSLad Prabhakar - const: renesas,rzg2l-canfd # RZ/G2L family 37*1aa5a06cSLad Prabhakar 388a5e7d19SGeert Uytterhoeven reg: 398a5e7d19SGeert Uytterhoeven maxItems: 1 408a5e7d19SGeert Uytterhoeven 41*1aa5a06cSLad Prabhakar interrupts: true 428a5e7d19SGeert Uytterhoeven 438a5e7d19SGeert Uytterhoeven clocks: 448a5e7d19SGeert Uytterhoeven maxItems: 3 458a5e7d19SGeert Uytterhoeven 468a5e7d19SGeert Uytterhoeven clock-names: 478a5e7d19SGeert Uytterhoeven items: 488a5e7d19SGeert Uytterhoeven - const: fck 498a5e7d19SGeert Uytterhoeven - const: canfd 508a5e7d19SGeert Uytterhoeven - const: can_clk 518a5e7d19SGeert Uytterhoeven 528a5e7d19SGeert Uytterhoeven power-domains: 538a5e7d19SGeert Uytterhoeven maxItems: 1 548a5e7d19SGeert Uytterhoeven 55*1aa5a06cSLad Prabhakar resets: true 568a5e7d19SGeert Uytterhoeven 578a5e7d19SGeert Uytterhoeven renesas,no-can-fd: 588a5e7d19SGeert Uytterhoeven $ref: /schemas/types.yaml#/definitions/flag 598a5e7d19SGeert Uytterhoeven description: 608a5e7d19SGeert Uytterhoeven The controller can operate in either CAN FD only mode (default) or 618a5e7d19SGeert Uytterhoeven Classical CAN only mode. The mode is global to both the channels. 628a5e7d19SGeert Uytterhoeven Specify this property to put the controller in Classical CAN only mode. 638a5e7d19SGeert Uytterhoeven 648a5e7d19SGeert Uytterhoeven assigned-clocks: 658a5e7d19SGeert Uytterhoeven description: 668a5e7d19SGeert Uytterhoeven Reference to the CANFD clock. The CANFD clock is a div6 clock and can be 678a5e7d19SGeert Uytterhoeven used by both CAN (if present) and CAN FD controllers at the same time. 688a5e7d19SGeert Uytterhoeven It needs to be scaled to maximum frequency if any of these controllers 698a5e7d19SGeert Uytterhoeven use it. 708a5e7d19SGeert Uytterhoeven 718a5e7d19SGeert Uytterhoeven assigned-clock-rates: 728a5e7d19SGeert Uytterhoeven description: Maximum frequency of the CANFD clock. 738a5e7d19SGeert Uytterhoeven 748a5e7d19SGeert UytterhoevenpatternProperties: 758a5e7d19SGeert Uytterhoeven "^channel[01]$": 768a5e7d19SGeert Uytterhoeven type: object 778a5e7d19SGeert Uytterhoeven description: 788a5e7d19SGeert Uytterhoeven The controller supports two channels and each is represented as a child 798a5e7d19SGeert Uytterhoeven node. Each child node supports the "status" property only, which 808a5e7d19SGeert Uytterhoeven is used to enable/disable the respective channel. 818a5e7d19SGeert Uytterhoeven 828a5e7d19SGeert Uytterhoevenrequired: 838a5e7d19SGeert Uytterhoeven - compatible 848a5e7d19SGeert Uytterhoeven - reg 858a5e7d19SGeert Uytterhoeven - interrupts 868a5e7d19SGeert Uytterhoeven - clocks 878a5e7d19SGeert Uytterhoeven - clock-names 888a5e7d19SGeert Uytterhoeven - power-domains 898a5e7d19SGeert Uytterhoeven - resets 908a5e7d19SGeert Uytterhoeven - assigned-clocks 918a5e7d19SGeert Uytterhoeven - assigned-clock-rates 928a5e7d19SGeert Uytterhoeven - channel0 938a5e7d19SGeert Uytterhoeven - channel1 948a5e7d19SGeert Uytterhoeven 95*1aa5a06cSLad Prabhakarif: 96*1aa5a06cSLad Prabhakar properties: 97*1aa5a06cSLad Prabhakar compatible: 98*1aa5a06cSLad Prabhakar contains: 99*1aa5a06cSLad Prabhakar enum: 100*1aa5a06cSLad Prabhakar - renesas,rzg2l-canfd 101*1aa5a06cSLad Prabhakarthen: 102*1aa5a06cSLad Prabhakar properties: 103*1aa5a06cSLad Prabhakar interrupts: 104*1aa5a06cSLad Prabhakar items: 105*1aa5a06cSLad Prabhakar - description: CAN global error interrupt 106*1aa5a06cSLad Prabhakar - description: CAN receive FIFO interrupt 107*1aa5a06cSLad Prabhakar - description: CAN0 error interrupt 108*1aa5a06cSLad Prabhakar - description: CAN0 transmit interrupt 109*1aa5a06cSLad Prabhakar - description: CAN0 transmit/receive FIFO receive completion interrupt 110*1aa5a06cSLad Prabhakar - description: CAN1 error interrupt 111*1aa5a06cSLad Prabhakar - description: CAN1 transmit interrupt 112*1aa5a06cSLad Prabhakar - description: CAN1 transmit/receive FIFO receive completion interrupt 113*1aa5a06cSLad Prabhakar 114*1aa5a06cSLad Prabhakar interrupt-names: 115*1aa5a06cSLad Prabhakar items: 116*1aa5a06cSLad Prabhakar - const: g_err 117*1aa5a06cSLad Prabhakar - const: g_recc 118*1aa5a06cSLad Prabhakar - const: ch0_err 119*1aa5a06cSLad Prabhakar - const: ch0_rec 120*1aa5a06cSLad Prabhakar - const: ch0_trx 121*1aa5a06cSLad Prabhakar - const: ch1_err 122*1aa5a06cSLad Prabhakar - const: ch1_rec 123*1aa5a06cSLad Prabhakar - const: ch1_trx 124*1aa5a06cSLad Prabhakar 125*1aa5a06cSLad Prabhakar resets: 126*1aa5a06cSLad Prabhakar maxItems: 2 127*1aa5a06cSLad Prabhakar 128*1aa5a06cSLad Prabhakar reset-names: 129*1aa5a06cSLad Prabhakar items: 130*1aa5a06cSLad Prabhakar - const: rstp_n 131*1aa5a06cSLad Prabhakar - const: rstc_n 132*1aa5a06cSLad Prabhakar 133*1aa5a06cSLad Prabhakar required: 134*1aa5a06cSLad Prabhakar - interrupt-names 135*1aa5a06cSLad Prabhakar - reset-names 136*1aa5a06cSLad Prabhakarelse: 137*1aa5a06cSLad Prabhakar properties: 138*1aa5a06cSLad Prabhakar interrupts: 139*1aa5a06cSLad Prabhakar items: 140*1aa5a06cSLad Prabhakar - description: Channel interrupt 141*1aa5a06cSLad Prabhakar - description: Global interrupt 142*1aa5a06cSLad Prabhakar 143*1aa5a06cSLad Prabhakar interrupt-names: 144*1aa5a06cSLad Prabhakar items: 145*1aa5a06cSLad Prabhakar - const: ch_int 146*1aa5a06cSLad Prabhakar - const: g_int 147*1aa5a06cSLad Prabhakar 148*1aa5a06cSLad Prabhakar resets: 149*1aa5a06cSLad Prabhakar maxItems: 1 150*1aa5a06cSLad Prabhakar 1518a5e7d19SGeert UytterhoevenunevaluatedProperties: false 1528a5e7d19SGeert Uytterhoeven 1538a5e7d19SGeert Uytterhoevenexamples: 1548a5e7d19SGeert Uytterhoeven - | 1558a5e7d19SGeert Uytterhoeven #include <dt-bindings/clock/r8a7795-cpg-mssr.h> 1568a5e7d19SGeert Uytterhoeven #include <dt-bindings/interrupt-controller/arm-gic.h> 1578a5e7d19SGeert Uytterhoeven #include <dt-bindings/power/r8a7795-sysc.h> 1588a5e7d19SGeert Uytterhoeven 1598a5e7d19SGeert Uytterhoeven canfd: can@e66c0000 { 1608a5e7d19SGeert Uytterhoeven compatible = "renesas,r8a7795-canfd", 1618a5e7d19SGeert Uytterhoeven "renesas,rcar-gen3-canfd"; 1628a5e7d19SGeert Uytterhoeven reg = <0xe66c0000 0x8000>; 1638a5e7d19SGeert Uytterhoeven interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1648a5e7d19SGeert Uytterhoeven <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1658a5e7d19SGeert Uytterhoeven clocks = <&cpg CPG_MOD 914>, 1668a5e7d19SGeert Uytterhoeven <&cpg CPG_CORE R8A7795_CLK_CANFD>, 1678a5e7d19SGeert Uytterhoeven <&can_clk>; 1688a5e7d19SGeert Uytterhoeven clock-names = "fck", "canfd", "can_clk"; 1698a5e7d19SGeert Uytterhoeven assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; 1708a5e7d19SGeert Uytterhoeven assigned-clock-rates = <40000000>; 1718a5e7d19SGeert Uytterhoeven power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1728a5e7d19SGeert Uytterhoeven resets = <&cpg 914>; 1738a5e7d19SGeert Uytterhoeven 1748a5e7d19SGeert Uytterhoeven channel0 { 1758a5e7d19SGeert Uytterhoeven }; 1768a5e7d19SGeert Uytterhoeven 1778a5e7d19SGeert Uytterhoeven channel1 { 1788a5e7d19SGeert Uytterhoeven }; 1798a5e7d19SGeert Uytterhoeven }; 180