1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/can/fsl,flexcan.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title:
8  Flexcan CAN controller on Freescale's ARM and PowerPC system-on-a-chip (SOC).
9
10maintainers:
11  - Marc Kleine-Budde <mkl@pengutronix.de>
12
13allOf:
14  - $ref: can-controller.yaml#
15
16properties:
17  compatible:
18    oneOf:
19      - enum:
20          - fsl,imx93-flexcan
21          - fsl,imx8qm-flexcan
22          - fsl,imx8mp-flexcan
23          - fsl,imx6q-flexcan
24          - fsl,imx28-flexcan
25          - fsl,imx25-flexcan
26          - fsl,p1010-flexcan
27          - fsl,vf610-flexcan
28          - fsl,ls1021ar2-flexcan
29          - fsl,lx2160ar1-flexcan
30      - items:
31          - enum:
32              - fsl,imx53-flexcan
33              - fsl,imx35-flexcan
34          - const: fsl,imx25-flexcan
35      - items:
36          - enum:
37              - fsl,imx7d-flexcan
38              - fsl,imx6ul-flexcan
39              - fsl,imx6sx-flexcan
40          - const: fsl,imx6q-flexcan
41      - items:
42          - enum:
43              - fsl,ls1028ar1-flexcan
44          - const: fsl,lx2160ar1-flexcan
45
46  reg:
47    maxItems: 1
48
49  interrupts:
50    maxItems: 1
51
52  clocks:
53    maxItems: 2
54
55  clock-names:
56    items:
57      - const: ipg
58      - const: per
59
60  clock-frequency:
61    description: |
62      The oscillator frequency driving the flexcan device, filled in by the
63      boot loader. This property should only be used the used operating system
64      doesn't support the clocks and clock-names property.
65
66  power-domains:
67    maxItems: 1
68
69  xceiver-supply:
70    description: Regulator that powers the CAN transceiver.
71
72  big-endian:
73    $ref: /schemas/types.yaml#/definitions/flag
74    description: |
75      This means the registers of FlexCAN controller are big endian. This is
76      optional property.i.e. if this property is not present in device tree
77      node then controller is assumed to be little endian. If this property is
78      present then controller is assumed to be big endian.
79
80  fsl,stop-mode:
81    description: |
82      Register bits of stop mode control.
83
84      The format should be as follows:
85      <gpr req_gpr req_bit>
86      gpr is the phandle to general purpose register node.
87      req_gpr is the gpr register offset of CAN stop request.
88      req_bit is the bit offset of CAN stop request.
89    $ref: /schemas/types.yaml#/definitions/phandle-array
90    items:
91      - items:
92          - description: The 'gpr' is the phandle to general purpose register node.
93          - description: The 'req_gpr' is the gpr register offset of CAN stop request.
94            maximum: 0xff
95          - description: The 'req_bit' is the bit offset of CAN stop request.
96            maximum: 0x1f
97
98  fsl,clk-source:
99    description: |
100      Select the clock source to the CAN Protocol Engine (PE). It's SoC
101      implementation dependent. Refer to RM for detailed definition. If this
102      property is not set in device tree node then driver selects clock source 1
103      by default.
104      0: clock source 0 (oscillator clock)
105      1: clock source 1 (peripheral clock)
106    $ref: /schemas/types.yaml#/definitions/uint8
107    default: 1
108    minimum: 0
109    maximum: 1
110
111  wakeup-source:
112    $ref: /schemas/types.yaml#/definitions/flag
113    description:
114      Enable CAN remote wakeup.
115
116  fsl,scu-index:
117    description: |
118      The scu index of CAN instance.
119      For SoCs with SCU support, need setup stop mode via SCU firmware, so this
120      property can help indicate a resource. It supports up to 3 CAN instances
121      now.
122    $ref: /schemas/types.yaml#/definitions/uint8
123    minimum: 0
124    maximum: 2
125
126  termination-gpios: true
127  termination-ohms: true
128
129required:
130  - compatible
131  - reg
132  - interrupts
133
134additionalProperties: false
135
136examples:
137  - |
138    can@1c000 {
139        compatible = "fsl,p1010-flexcan";
140        reg = <0x1c000 0x1000>;
141        interrupts = <48 0x2>;
142        interrupt-parent = <&mpic>;
143        clock-frequency = <200000000>;
144        fsl,clk-source = /bits/ 8 <0>;
145    };
146  - |
147    #include <dt-bindings/interrupt-controller/irq.h>
148
149    can@2090000 {
150        compatible = "fsl,imx6q-flexcan";
151        reg = <0x02090000 0x4000>;
152        interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
153        clocks = <&clks 1>, <&clks 2>;
154        clock-names = "ipg", "per";
155        fsl,stop-mode = <&gpr 0x34 28>;
156        fsl,scu-index = /bits/ 8 <1>;
157    };
158  - |
159    #include <dt-bindings/interrupt-controller/irq.h>
160    #include <dt-bindings/gpio/gpio.h>
161
162    can@2090000 {
163        compatible = "fsl,imx6q-flexcan";
164        reg = <0x02090000 0x4000>;
165        interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
166        clocks = <&clks 1>, <&clks 2>;
167        clock-names = "ipg", "per";
168        fsl,stop-mode = <&gpr 0x34 28>;
169        termination-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
170        termination-ohms = <120>;
171    };
172