1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/net/can/fsl,flexcan.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: 8 Flexcan CAN controller on Freescale's ARM and PowerPC system-on-a-chip (SOC). 9 10maintainers: 11 - Marc Kleine-Budde <mkl@pengutronix.de> 12 13allOf: 14 - $ref: can-controller.yaml# 15 16properties: 17 compatible: 18 oneOf: 19 - enum: 20 - fsl,imx8qm-flexcan 21 - fsl,imx8mp-flexcan 22 - fsl,imx6q-flexcan 23 - fsl,imx53-flexcan 24 - fsl,imx35-flexcan 25 - fsl,imx28-flexcan 26 - fsl,imx25-flexcan 27 - fsl,p1010-flexcan 28 - fsl,vf610-flexcan 29 - fsl,ls1021ar2-flexcan 30 - fsl,lx2160ar1-flexcan 31 - items: 32 - enum: 33 - fsl,imx7d-flexcan 34 - fsl,imx6ul-flexcan 35 - fsl,imx6sx-flexcan 36 - const: fsl,imx6q-flexcan 37 - items: 38 - enum: 39 - fsl,ls1028ar1-flexcan 40 - const: fsl,lx2160ar1-flexcan 41 42 reg: 43 maxItems: 1 44 45 interrupts: 46 maxItems: 1 47 48 clocks: 49 maxItems: 2 50 51 clock-names: 52 items: 53 - const: ipg 54 - const: per 55 56 clock-frequency: 57 description: | 58 The oscillator frequency driving the flexcan device, filled in by the 59 boot loader. This property should only be used the used operating system 60 doesn't support the clocks and clock-names property. 61 62 xceiver-supply: 63 description: Regulator that powers the CAN transceiver. 64 65 big-endian: 66 $ref: /schemas/types.yaml#/definitions/flag 67 description: | 68 This means the registers of FlexCAN controller are big endian. This is 69 optional property.i.e. if this property is not present in device tree 70 node then controller is assumed to be little endian. If this property is 71 present then controller is assumed to be big endian. 72 73 fsl,stop-mode: 74 description: | 75 Register bits of stop mode control. 76 77 The format should be as follows: 78 <gpr req_gpr req_bit> 79 gpr is the phandle to general purpose register node. 80 req_gpr is the gpr register offset of CAN stop request. 81 req_bit is the bit offset of CAN stop request. 82 $ref: /schemas/types.yaml#/definitions/phandle-array 83 items: 84 - description: The 'gpr' is the phandle to general purpose register node. 85 - description: The 'req_gpr' is the gpr register offset of CAN stop request. 86 maximum: 0xff 87 - description: The 'req_bit' is the bit offset of CAN stop request. 88 maximum: 0x1f 89 90 fsl,clk-source: 91 description: | 92 Select the clock source to the CAN Protocol Engine (PE). It's SoC 93 implementation dependent. Refer to RM for detailed definition. If this 94 property is not set in device tree node then driver selects clock source 1 95 by default. 96 0: clock source 0 (oscillator clock) 97 1: clock source 1 (peripheral clock) 98 $ref: /schemas/types.yaml#/definitions/uint32 99 default: 1 100 minimum: 0 101 maximum: 1 102 103 wakeup-source: 104 $ref: /schemas/types.yaml#/definitions/flag 105 description: 106 Enable CAN remote wakeup. 107 108required: 109 - compatible 110 - reg 111 - interrupts 112 113additionalProperties: false 114 115examples: 116 - | 117 can@1c000 { 118 compatible = "fsl,p1010-flexcan"; 119 reg = <0x1c000 0x1000>; 120 interrupts = <48 0x2>; 121 interrupt-parent = <&mpic>; 122 clock-frequency = <200000000>; 123 fsl,clk-source = <0>; 124 }; 125 - | 126 #include <dt-bindings/interrupt-controller/irq.h> 127 128 can@2090000 { 129 compatible = "fsl,imx6q-flexcan"; 130 reg = <0x02090000 0x4000>; 131 interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>; 132 clocks = <&clks 1>, <&clks 2>; 133 clock-names = "ipg", "per"; 134 fsl,stop-mode = <&gpr 0x34 28>; 135 }; 136