1* Broadcom Starfighter 2 integrated swich 2 3Required properties: 4 5- compatible: should be "brcm,bcm7445-switch-v4.0" or "brcm,bcm7278-switch-v4.0" 6- reg: addresses and length of the register sets for the device, must be 6 7 pairs of register addresses and lengths 8- interrupts: interrupts for the devices, must be two interrupts 9- #address-cells: must be 1, see dsa/dsa.txt 10- #size-cells: must be 0, see dsa/dsa.txt 11 12Deprecated binding required properties: 13 14- dsa,mii-bus: phandle to the MDIO bus controller, see dsa/dsa.txt 15- dsa,ethernet: phandle to the CPU network interface controller, see dsa/dsa.txt 16- #address-cells: must be 2, see dsa/dsa.txt 17 18Subnodes: 19 20The integrated switch subnode should be specified according to the binding 21described in dsa/dsa.txt. 22 23Optional properties: 24 25- reg-names: litteral names for the device base register addresses, when present 26 must be: "core", "reg", "intrl2_0", "intrl2_1", "fcb", "acb" 27 28- interrupt-names: litternal names for the device interrupt lines, when present 29 must be: "switch_0" and "switch_1" 30 31- brcm,num-gphy: specify the maximum number of integrated gigabit PHYs in the 32 switch 33 34- brcm,num-rgmii-ports: specify the maximum number of RGMII interfaces supported 35 by the switch 36 37- brcm,fcb-pause-override: boolean property, if present indicates that the switch 38 supports Failover Control Block pause override capability 39 40- brcm,acb-packets-inflight: boolean property, if present indicates that the switch 41 Admission Control Block supports reporting the number of packets in-flight in a 42 switch queue 43 44Port subnodes: 45 46Optional properties: 47 48- brcm,use-bcm-hdr: boolean property, if present, indicates that the switch 49 port has Broadcom tags enabled (per-packet metadata) 50 51Example: 52 53switch_top@f0b00000 { 54 compatible = "simple-bus"; 55 #size-cells = <1>; 56 #address-cells = <1>; 57 ranges = <0 0xf0b00000 0x40804>; 58 59 ethernet_switch@0 { 60 compatible = "brcm,bcm7445-switch-v4.0"; 61 #size-cells = <0>; 62 #address-cells = <1>; 63 reg = <0x0 0x40000 64 0x40000 0x110 65 0x40340 0x30 66 0x40380 0x30 67 0x40400 0x34 68 0x40600 0x208>; 69 reg-names = "core", "reg", intrl2_0", "intrl2_1", 70 "fcb, "acb"; 71 interrupts = <0 0x18 0 72 0 0x19 0>; 73 brcm,num-gphy = <1>; 74 brcm,num-rgmii-ports = <2>; 75 brcm,fcb-pause-override; 76 brcm,acb-packets-inflight; 77 78 ports { 79 #address-cells = <1>; 80 #size-cells = <0>; 81 82 port@0 { 83 label = "gphy"; 84 reg = <0>; 85 }; 86 }; 87 }; 88}; 89 90Example using the old DSA DeviceTree binding: 91 92switch_top@f0b00000 { 93 compatible = "simple-bus"; 94 #size-cells = <1>; 95 #address-cells = <1>; 96 ranges = <0 0xf0b00000 0x40804>; 97 98 ethernet_switch@0 { 99 compatible = "brcm,bcm7445-switch-v4.0"; 100 #size-cells = <0>; 101 #address-cells = <2>; 102 reg = <0x0 0x40000 103 0x40000 0x110 104 0x40340 0x30 105 0x40380 0x30 106 0x40400 0x34 107 0x40600 0x208>; 108 interrupts = <0 0x18 0 109 0 0x19 0>; 110 brcm,num-gphy = <1>; 111 brcm,num-rgmii-ports = <2>; 112 brcm,fcb-pause-override; 113 brcm,acb-packets-inflight; 114 115 ... 116 switch@0 { 117 reg = <0 0>; 118 #size-cells = <0>; 119 #address-cells <1>; 120 121 port@0 { 122 label = "gphy"; 123 reg = <0>; 124 brcm,use-bcm-hdr; 125 }; 126 ... 127 }; 128 }; 129}; 130