1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2# Copyright 2019 BayLibre, SAS 3%YAML 1.2 4--- 5$id: "http://devicetree.org/schemas/net/amlogic,meson-dwmac.yaml#" 6$schema: "http://devicetree.org/meta-schemas/core.yaml#" 7 8title: Amlogic Meson DWMAC Ethernet controller 9 10maintainers: 11 - Neil Armstrong <narmstrong@baylibre.com> 12 - Martin Blumenstingl <martin.blumenstingl@googlemail.com> 13 14# We need a select here so we don't match all nodes with 'snps,dwmac' 15select: 16 properties: 17 compatible: 18 contains: 19 enum: 20 - amlogic,meson6-dwmac 21 - amlogic,meson8b-dwmac 22 - amlogic,meson8m2-dwmac 23 - amlogic,meson-gxbb-dwmac 24 - amlogic,meson-axg-dwmac 25 - amlogic,meson-g12a-dwmac 26 required: 27 - compatible 28 29allOf: 30 - $ref: "snps,dwmac.yaml#" 31 - if: 32 properties: 33 compatible: 34 contains: 35 enum: 36 - amlogic,meson8b-dwmac 37 - amlogic,meson8m2-dwmac 38 - amlogic,meson-gxbb-dwmac 39 - amlogic,meson-axg-dwmac 40 - amlogic,meson-g12a-dwmac 41 42 then: 43 properties: 44 clocks: 45 minItems: 3 46 items: 47 - description: GMAC main clock 48 - description: First parent clock of the internal mux 49 - description: Second parent clock of the internal mux 50 - description: The clock which drives the timing adjustment logic 51 52 clock-names: 53 minItems: 3 54 items: 55 - const: stmmaceth 56 - const: clkin0 57 - const: clkin1 58 - const: timing-adjustment 59 60 amlogic,tx-delay-ns: 61 $ref: /schemas/types.yaml#/definitions/uint32 62 description: 63 The internal RGMII TX clock delay (provided by this driver) in 64 nanoseconds. Allowed values are 0ns, 2ns, 4ns, 6ns. 65 When phy-mode is set to "rgmii" then the TX delay should be 66 explicitly configured. When not configured a fallback of 2ns is 67 used. When the phy-mode is set to either "rgmii-id" or "rgmii-txid" 68 the TX clock delay is already provided by the PHY. In that case 69 this property should be set to 0ns (which disables the TX clock 70 delay in the MAC to prevent the clock from going off because both 71 PHY and MAC are adding a delay). 72 Any configuration is ignored when the phy-mode is set to "rmii". 73 74 amlogic,rx-delay-ns: 75 deprecated: true 76 enum: 77 - 0 78 - 2 79 default: 0 80 description: 81 The internal RGMII RX clock delay in nanoseconds. Deprecated, use 82 rx-internal-delay-ps instead. 83 84 rx-internal-delay-ps: 85 default: 0 86 87 - if: 88 properties: 89 compatible: 90 contains: 91 enum: 92 - amlogic,meson8b-dwmac 93 - amlogic,meson8m2-dwmac 94 - amlogic,meson-gxbb-dwmac 95 - amlogic,meson-axg-dwmac 96 then: 97 properties: 98 rx-internal-delay-ps: 99 enum: 100 - 0 101 - 2000 102 103 - if: 104 properties: 105 compatible: 106 contains: 107 enum: 108 - amlogic,meson-g12a-dwmac 109 then: 110 properties: 111 rx-internal-delay-ps: 112 enum: 113 - 0 114 - 200 115 - 400 116 - 600 117 - 800 118 - 1000 119 - 1200 120 - 1400 121 - 1600 122 - 1800 123 - 2000 124 - 2200 125 - 2400 126 - 2600 127 - 2800 128 - 3000 129 130properties: 131 compatible: 132 additionalItems: true 133 maxItems: 3 134 items: 135 - enum: 136 - amlogic,meson6-dwmac 137 - amlogic,meson8b-dwmac 138 - amlogic,meson8m2-dwmac 139 - amlogic,meson-gxbb-dwmac 140 - amlogic,meson-axg-dwmac 141 - amlogic,meson-g12a-dwmac 142 contains: 143 enum: 144 - snps,dwmac-3.70a 145 - snps,dwmac 146 147 reg: 148 items: 149 - description: 150 The first register range should be the one of the DWMAC controller 151 - description: 152 The second range is is for the Amlogic specific configuration 153 (for example the PRG_ETHERNET register range on Meson8b and newer) 154 155required: 156 - compatible 157 - reg 158 - interrupts 159 - interrupt-names 160 - clocks 161 - clock-names 162 - phy-mode 163 164unevaluatedProperties: false 165 166examples: 167 - | 168 ethmac: ethernet@c9410000 { 169 compatible = "amlogic,meson-gxbb-dwmac", "snps,dwmac"; 170 reg = <0xc9410000 0x10000>, <0xc8834540 0x8>; 171 interrupts = <8>; 172 interrupt-names = "macirq"; 173 clocks = <&clk_eth>, <&clk_fclk_div2>, <&clk_mpll2>, <&clk_fclk_div2>; 174 clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment"; 175 phy-mode = "rgmii"; 176 }; 177