1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-emac.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Allwinner A83t EMAC Device Tree Bindings 8 9maintainers: 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <maxime.ripard@bootlin.com> 12 13properties: 14 compatible: 15 oneOf: 16 - const: allwinner,sun8i-a83t-emac 17 - const: allwinner,sun8i-h3-emac 18 - const: allwinner,sun8i-r40-emac 19 - const: allwinner,sun8i-v3s-emac 20 - const: allwinner,sun50i-a64-emac 21 - items: 22 - const: allwinner,sun50i-h6-emac 23 - const: allwinner,sun50i-a64-emac 24 25 reg: 26 maxItems: 1 27 28 interrupts: 29 maxItems: 1 30 31 interrupt-names: 32 const: macirq 33 34 clocks: 35 maxItems: 1 36 37 clock-names: 38 const: stmmaceth 39 40 syscon: 41 $ref: /schemas/types.yaml#definitions/phandle 42 description: 43 Phandle to the device containing the EMAC or GMAC clock 44 register 45 46required: 47 - compatible 48 - reg 49 - interrupts 50 - interrupt-names 51 - clocks 52 - clock-names 53 - resets 54 - reset-names 55 - phy-handle 56 - phy-mode 57 - syscon 58 59allOf: 60 - $ref: "snps,dwmac.yaml#" 61 - if: 62 properties: 63 compatible: 64 contains: 65 enum: 66 - allwinner,sun8i-a83t-emac 67 - allwinner,sun8i-h3-emac 68 - allwinner,sun8i-v3s-emac 69 - allwinner,sun50i-a64-emac 70 71 then: 72 properties: 73 allwinner,tx-delay-ps: 74 default: 0 75 minimum: 0 76 maximum: 700 77 multipleOf: 100 78 description: 79 External RGMII PHY TX clock delay chain value in ps. 80 81 allwinner,rx-delay-ps: 82 default: 0 83 minimum: 0 84 maximum: 3100 85 multipleOf: 100 86 description: 87 External RGMII PHY TX clock delay chain value in ps. 88 89 - if: 90 properties: 91 compatible: 92 contains: 93 enum: 94 - allwinner,sun8i-r40-emac 95 96 then: 97 properties: 98 allwinner,rx-delay-ps: 99 default: 0 100 minimum: 0 101 maximum: 700 102 multipleOf: 100 103 description: 104 External RGMII PHY TX clock delay chain value in ps. 105 106 - if: 107 properties: 108 compatible: 109 contains: 110 enum: 111 - allwinner,sun8i-h3-emac 112 - allwinner,sun8i-v3s-emac 113 114 then: 115 properties: 116 allwinner,leds-active-low: 117 $ref: /schemas/types.yaml#definitions/flag 118 description: 119 EPHY LEDs are active low. 120 121 mdio-mux: 122 type: object 123 124 properties: 125 compatible: 126 const: allwinner,sun8i-h3-mdio-mux 127 128 mdio-parent-bus: 129 $ref: /schemas/types.yaml#definitions/phandle 130 description: 131 Phandle to EMAC MDIO. 132 133 mdio@1: 134 type: object 135 description: Internal MDIO Bus 136 137 properties: 138 "#address-cells": 139 const: 1 140 141 "#size-cells": 142 const: 0 143 144 compatible: 145 const: allwinner,sun8i-h3-mdio-internal 146 147 reg: 148 const: 1 149 150 patternProperties: 151 "^ethernet-phy@[0-9a-f]$": 152 type: object 153 description: 154 Integrated PHY node 155 156 properties: 157 clocks: 158 maxItems: 1 159 160 resets: 161 maxItems: 1 162 163 required: 164 - clocks 165 - resets 166 167 168 mdio@2: 169 type: object 170 description: External MDIO Bus (H3 only) 171 172 properties: 173 "#address-cells": 174 const: 1 175 176 "#size-cells": 177 const: 0 178 179 reg: 180 const: 2 181 182 required: 183 - compatible 184 - mdio-parent-bus 185 - mdio@1 186 187examples: 188 - | 189 ethernet@1c0b000 { 190 compatible = "allwinner,sun8i-h3-emac"; 191 syscon = <&syscon>; 192 reg = <0x01c0b000 0x104>; 193 interrupts = <0 82 1>; 194 interrupt-names = "macirq"; 195 resets = <&ccu 12>; 196 reset-names = "stmmaceth"; 197 clocks = <&ccu 27>; 198 clock-names = "stmmaceth"; 199 200 phy-handle = <&int_mii_phy>; 201 phy-mode = "mii"; 202 allwinner,leds-active-low; 203 204 mdio1: mdio { 205 #address-cells = <1>; 206 #size-cells = <0>; 207 compatible = "snps,dwmac-mdio"; 208 }; 209 210 mdio-mux { 211 compatible = "allwinner,sun8i-h3-mdio-mux"; 212 #address-cells = <1>; 213 #size-cells = <0>; 214 215 mdio-parent-bus = <&mdio1>; 216 217 int_mii_phy: mdio@1 { 218 compatible = "allwinner,sun8i-h3-mdio-internal"; 219 reg = <1>; 220 #address-cells = <1>; 221 #size-cells = <0>; 222 223 ethernet-phy@1 { 224 reg = <1>; 225 clocks = <&ccu 67>; 226 resets = <&ccu 39>; 227 phy-is-integrated; 228 }; 229 }; 230 231 mdio@2 { 232 reg = <2>; 233 #address-cells = <1>; 234 #size-cells = <0>; 235 }; 236 }; 237 }; 238 239 - | 240 ethernet@1c0b000 { 241 compatible = "allwinner,sun8i-h3-emac"; 242 syscon = <&syscon>; 243 reg = <0x01c0b000 0x104>; 244 interrupts = <0 82 1>; 245 interrupt-names = "macirq"; 246 resets = <&ccu 12>; 247 reset-names = "stmmaceth"; 248 clocks = <&ccu 27>; 249 clock-names = "stmmaceth"; 250 251 phy-handle = <&ext_rgmii_phy>; 252 phy-mode = "rgmii"; 253 allwinner,leds-active-low; 254 255 mdio2: mdio { 256 #address-cells = <1>; 257 #size-cells = <0>; 258 compatible = "snps,dwmac-mdio"; 259 }; 260 261 mdio-mux { 262 compatible = "allwinner,sun8i-h3-mdio-mux"; 263 #address-cells = <1>; 264 #size-cells = <0>; 265 mdio-parent-bus = <&mdio2>; 266 267 mdio@1 { 268 compatible = "allwinner,sun8i-h3-mdio-internal"; 269 reg = <1>; 270 #address-cells = <1>; 271 #size-cells = <0>; 272 273 ethernet-phy@1 { 274 reg = <1>; 275 clocks = <&ccu 67>; 276 resets = <&ccu 39>; 277 }; 278 }; 279 280 mdio@2 { 281 reg = <2>; 282 #address-cells = <1>; 283 #size-cells = <0>; 284 285 ext_rgmii_phy: ethernet-phy@1 { 286 reg = <1>; 287 }; 288 }; 289 }; 290 }; 291 292 - | 293 ethernet@1c0b000 { 294 compatible = "allwinner,sun8i-a83t-emac"; 295 syscon = <&syscon>; 296 reg = <0x01c0b000 0x104>; 297 interrupts = <0 82 1>; 298 interrupt-names = "macirq"; 299 resets = <&ccu 13>; 300 reset-names = "stmmaceth"; 301 clocks = <&ccu 27>; 302 clock-names = "stmmaceth"; 303 phy-handle = <&ext_rgmii_phy1>; 304 phy-mode = "rgmii"; 305 306 mdio { 307 compatible = "snps,dwmac-mdio"; 308 #address-cells = <1>; 309 #size-cells = <0>; 310 311 ext_rgmii_phy1: ethernet-phy@1 { 312 reg = <1>; 313 }; 314 }; 315 }; 316 317# FIXME: We should set it, but it would report all the generic 318# properties as additional properties. 319# additionalProperties: false 320 321... 322